IDT
/ ICS
LVCMOS/LVTTL FANOUT BUFFER/DIVIDER 7 ICS87004AG-03 REV. B APRIL 3, 2008
ICS87004-03
LVCMOS/LVTTL FANOUT BUFFER/DIVIDER PRELIMINARY
PARAMETER MEASUREMENT INFORMATION
3.3V CORE/ 1.8V OUTPUT LOAD AC TEST CIRCUIT
3.3V CORE/ 2.5V OUTPUT LOAD AC TEST CIRCUIT3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
PART-TO-PART SKEW
BANK SKEW
OUTPUT SKEW
SCOPE
Qx
LVCMOS
GND
-1.65V±5%
1.65V±5%
-1.25V±5%
1.25V±5%
SCOPE
Qx
LVCMOS
GND
V
DD
V
DDOA,
V
DDOB
2.05V±5%
V
DD
,
V
DDOA,
V
DDOB
t
sk(pp)
V
DDOX
2
V
DDOX
2
Qx
Qy
PART 1
PART 2
SCOPE
Qx
LVCMOS
GND
-0.9V±0.075V
0.9V±0.075V
V
DD
2.4V±0.09V
GND
V
DDOA,
V
DDOB
t
sk(o)
V
DDOX
2
V
DDOX
2
Qx
Qy
t
sk(b)
V
DDOX
2
V
DDOX
2
QX0, QX1
QX0, QX1
IDT
/ ICS
LVCMOS/LVTTL FANOUT BUFFER/DIVIDER 8 ICS87004AG-03 REV. B APRIL 3, 2008
ICS87004-03
LVCMOS/LVTTL FANOUT BUFFER/DIVIDER PRELIMINARY
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
OUTPUT RISE/FALL TIMEPROPAGATION DELAY
Clock
Outputs
20%
80%
80%
20%
t
R
t
F
t
PERIOD
t
PW
t
PERIOD
odc =
V
DDOX
2
x 100%
t
PW
QA0,QA1
QB0,QB1
CLK0,
CLK1
QA0,QA1
QB0,QB1
t
PD
V
DD
2
V
DDOX
2
IDT
/ ICS
LVCMOS/LVTTL FANOUT BUFFER/DIVIDER 9 ICS87004AG-03 REV. B APRIL 3, 2008
ICS87004-03
LVCMOS/LVTTL FANOUT BUFFER/DIVIDER PRELIMINARY
APPLICATION INFORMATION
INPUTS:
CLK INPUT:
For applications not requiring the use of a clock input, it can be
left floating. Though not required, but for additional protection, a
1kΩ resistor can be tied from the CLK input to ground.
LVCMOS C
ONTROL PINS:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVCMOS OUTPUT:
All unused LVCMOS output can be left floating. There should
be no tr
ace attached.

87004BG-03LFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Generators & Support Products 4 OUT BUFFER/DIVIDER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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