74AHC_AHCT86_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 5 June 2013 7 of 15
NXP Semiconductors 74AHC86-Q100; 74AHCT86-Q100
Quad 2-input EXCLUSIVE-OR gate
[1] Typical values are measured at nominal supply voltage (V
CC
= 3.3 V and V
CC
= 5.0 V).
[2] t
pd
is the same as t
PLH
and t
PHL
.
[3] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz, f
o
= output frequency in MHz
C
L
= output load capacitance in pF
V
CC
= supply voltage in Volts
N = number of inputs switching
(C
L
V
CC
2
f
o
) = sum of the outputs.
11. Waveforms
For type 74AHCT86-Q100
t
pd
propagation
delay
nA, nB to nY; see Figure 6
[2]
V
CC
= 4.5 V to 5.5 V
C
L
= 15 pF - 3.4 6.9 1.0 8.0 1.0 9.0 ns
C
L
= 50 pF - 4.9 8.8 1.0 10.0 1.0 11.0 ns
C
PD
power
dissipation
capacitance
C
L
=50pF; f
i
= 1 MHz;
V
I
=GNDtoV
CC
[3]
- 12.0 - - - - - pF
Table 7. Dynamic characteristics
…continued
GND = 0 V; For test circuit see Figure 7.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max Min Max
Measurement points are given in Tab le 8.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 6. Propagation delay input (nA, nB) to output (nY)
mna224
nA, nB input
nY output
t
PLH
t
PHL
GND
V
I
V
M
V
M
V
OH
V
OL
Table 8. Measurement points
Type Input Output
V
M
V
M
74AHC86-Q100 0.5V
CC
0.5V
CC
74AHCT86-Q100 1.5 V 0.5V
CC
