LTC3240EDC-3.3#TRMPBF

LTC3240-3.3/LTC3240-2.5
7
3240fb
OPERATIO
U
(Refer to the Block Diagram)
The LTC3240 is a step-up/step-down charge pump DC/DC
converter. For V
IN
greater than V
OUT
by about 100mV it
operates as a low dropout regulator. Once V
IN
drops to
within 100mV of V
OUT
, the part automatically switches
into charge pump mode to boost V
IN
to the regulated
output voltage. Regulation is achieved by sensing the
output voltage through an internal resistor divider and
modulating the charge pump output current based on
the error signal.
In the charge pump mode a 2-phase nonoverlapping clock
activates the charge pump switches. The fl ying capacitor
is charged from V
IN
on the fi rst phase of the clock. On
the second phase of the clock it is stacked in series with
V
IN
and connected to V
OUT
. This sequence of charging
and discharging the fl ying capacitor continues at a free
running frequency of 1.2MHz (typ).
Shutdown Mode
In shutdown mode, all circuitry is turned off and the
LTC3240 draws only leakage current from the V
IN
supply.
Furthermore, V
OUT
is disconnected from V
IN
. The
S
H
D
N
pin is a CMOS input with a threshold voltage of approxi-
mately 0.8V. The LTC3240 is in shutdown when a logic
low is applied to the
S
H
D
N pin. Since the
S
H
D
N pin is a
high impedance CMOS input, it should never be allowed
to fl oat. To ensure that its state is defi ned, it must always
be driven with a valid logic level.
Since the output voltage of this device can go above the
input voltage, circuitry is required to control the state of
the converter even in shutdown. This circuitry will draw
an input current of 5μA in shutdown. However, this cur-
rent is eliminated when the output voltage (V
OUT
) drops
to less than approximately 0.8V.
Burst Mode Operation
The LTC3240 provides automatic Burst Mode operation
while operating as a charge pump, to increase effi ciency of
the power converter at light loads. Burst Mode operation
is initiated if the output load current falls below an inter-
nally programmed threshold. Once Burst Mode operation
is initiated, the part shuts down the internal oscillator to
reduce the switching losses, and goes into a low current
state. This state is referred to as the sleep state in which
the IC consumes only about 65μA from the input. When
the output voltage droops enough to overcome the burst
comparator hysteresis, the part wakes up and commences
normal fi xed frequency operation recharging the output
capacitor. If the output load is still less than the Burst Mode
threshold the part will re-enter sleep state. This Burst Mode
threshold varies with V
IN
, V
OUT
and the choice of output
storage capacitor.
Soft-Start
The LTC3240 has built-in soft-start circuitry to prevent
excessive current fl ow during start-up. The soft-start is
achieved by internal circuitry that slowly ramps the amount
of current available to the output storage capacitor from
zero to a value of 300mA over a period of approximately
2ms. The soft-start circuitry is reset in the event of a com-
manded shutdown or thermal shutdown.
Short-Circuit/Thermal Protection
The LTC3240 has built-in short-circuit current limit as
well as overtemperature protection. During a short-circuit
condition, the part automatically limits its output current to
approximately 300mA. If the junction temperature exceeds
approximately 160°C the thermal shutdown circuitry shuts
down current delivery to the output. Once the junction
temperature drops back to approximately 150°C cur-
rent delivery to the output is resumed. The LTC3240 will
cycle in and out of thermal shutdown indefi nitely without
latch-up or damage until the short-circuit condition on
V
OUT
is removed. Long term overstress (i.e. operation at
junction temperatures above 125°C) should be avoided
as it reduces the lifetime of the part and can result in
degraded performance.
LTC3240-3.3/LTC3240-2.5
8
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Power Effi ciency
During LDO operation, the power effi ciency (η) of the
LTC3240 is given by:
η= = =
P
P
VI
VI
V
V
OUT
IN
OUT OUT
IN OUT
OUT
IN
At moderate to high output power, the quiescent cur-
rent of the LTC3240 is negligible and the expression
above is valid. For example, the measured effi ciency of
LTC3240-3.3, with V
IN
= 3.7V, I
OUT
= 100mA and V
OUT
regulating to 3.3V is 87% which is in close agreement
with the theoretical value of 89%.
During charge pump operation, the power effi ciency (η)
of the LTC3240 is similar to that of a linear regulator with
an effective input voltage of twice the actual input volt-
age. This occurs because the input current for a voltage
doubling charge pump is approximately twice the output
current. In an ideal regulating voltage doubler the power
effi ciency is given by:
η= = =
P
P
VI
VI
V
V
OUT
IN
OUT OUT
IN OUT
OUT
IN
•2 2
At moderate to high output power, the switching losses
and the quiescent current of the LTC3240 are negligible
and the expression above is valid. For example, the mea-
sured effi ciency of LTC3240-3.3 with V
IN
= 2.5V, I
OUT
=
100mA and V
OUT
regulating to 3.3V is 64% which is in
close agreement with the theoretical value of 66%.
Effective Open-Loop Output Resistance (R
OL
)
The effective open-loop output resistance (R
OL
) of a charge
pump is a very important parameter which determines the
strength of the charge pump. The value of this parameter
depends on many factors such as the oscillator frequency
(f
OSC
), value of the fl ying capacitor (C
FLY
), the nonoverlap
time, the internal switch resistances (R
S
), and the ESR of
the external capacitors. A fi rst order approximation for
R
OL
is given below:
RR
fC
LS
STO
OSC FLY
0
14
2
1
+
=
For the LTC3240 in charge pump mode, the maximum
available output current and voltage can be calculated
from the effective open-loop output resistance, R
OL
, and
the effective output voltage, 2V
IN(MIN)
.
From Figure 1, the available current is given by:
I
VV
R
OUT
IN OUT
OL
=
2–
Typical R
OL
values as a function of temperature are shown
in Figure 2.
APPLICATIO S I FOR ATIO
WUU
U
Figure 1. Equivalent Open-Loop Circuit
+
R
OL
I
OUT
V
OUT
2V
IN
3240 F01
+
Figure 2. Typical R
OL
vs Temperature
V
IN
, V
OUT
Capacitor Selection
The style and value of capacitors used with the LTC3240
determine several important parameters such as regulator
control loop stability, output ripple, charge pump strength
and minimum start-up time.
To reduce noise and ripple, it is recommended that low
ESR (<0.1Ω) ceramic capacitors be used for both C
IN
and
C
OUT
. C
IN
should be 1µF or greater while C
OUT
should be
4.7µF or greater. Tantalum and aluminum capacitors are
not recommended because of their high ESR.
TEMPERATURE (°C)
–40
EFFECTIVE OPEN-LOOP RESISTANCE ()
8
9
10
60
3240 G07
7
6
5
–15
10
35
85
V
IN
= 1.8V
V
OUT
= 3V
LTC3240-3.3/LTC3240-2.5
9
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In charge pump mode the value of C
OUT
directly controls the
amount of output ripple for a given load current. Increasing
the size of C
OUT
will reduce the output ripple at the expense
of higher minimum turn-on time. The peak-to-peak output
ripple is approximately given by the expression:
V
I
fC
RIPPLE P P
OUT
OSC OUT
()
2
where f
OSC
is the oscillator frequency (typically 1.2MHz)
and C
OUT
is the value of the output capacitor.
Also, the value and style of the output capacitor can sig-
nifi cantly affect the stability of the LTC3240. As shown
in the Block Diagram, the LTC3240 uses a linear control
loop to adjust the strength of the charge pump to match
the current required at the output. The error signal of this
loop is stored directly on the output storage capacitor.
This output capacitor also serves to form the dominant
pole of the control loop. To prevent ringing or instability
on the LTC3240, it is important to maintain at least 2µF
of capacitance over all conditions.
Excessive ESR on the output capacitor can degrade the
loop stability of the LTC3240. The closed-loop output
resistance of the LTC3240 is designed to be 0.5Ω. For a
100mA load current change, the output voltage will change
by about 50mV. If the output capacitor has 0.5Ω or more
of ESR, the closed-loop frequency response will cease to
roll off in a simple one-pole fashion and poor load transient
response or instability could result. Ceramic capacitors
typically have exceptional ESR performance and combined
with a tight board layout should yield very good stability
and load transient performance.
Just as the value of C
OUT
controls the amount of output
ripple, the value of C
IN
controls the amount of ripple
present at the input pin (V
IN
) in charge pump mode. The
input current to the LTC3240 is relatively constant during
the input charging phase and the output charging phase
but drops to zero during the nonoverlap times. Since the
nonoverlap time is small (~25ns), these missing notches
result in a small perturbation on the input power supply
line. A higher ESR capacitor such as tantalum will have
higher input noise than a low ESR ceramic capacitor.
Therefore, ceramic capacitors are again recommended
for their exceptional ESR performance.
Further input noise reduction can be achieved by power-
ing the LTC3240 through a very small series inductor as
shown in Figure 3. A 10nH inductor will reject the fast
current notches, thereby presenting a nearly constant
current load to the input power supply. For economy, the
10nH inductor can be fabricated on the PC board with
about 1cm (0.4") of PC board trace.
Flying Capacitor Selection
Warning: A polarized capacitor such as tantalum or alumi-
num should never be used for the fl ying capacitor since
its voltage can reverse upon start-up of the LTC3240.
Low ESR ceramic capacitors should always be used for
the fl ying capacitor.
The fl ying capacitor controls the strength of the charge
pump. A 1µF or greater ceramic capacitor is suggested
for the fl ying capacitor. For the LTC3240-3.3 operating
at an input voltage in the range 1.8V ≤ V
IN
≤ 2.5V, it is
necessary to have at least 0.5µF of capacitance for the
ying capacitor in order to achieve the maximum rated
current of 40mA.
For very light load applications, the fl ying capacitor may
be reduced to save space or cost. From the fi rst order
approximation of R
OL
in the “Effective Open-Loop Output
Resistance” section, the theoretical minimum output
resistance of a voltage doubling charge pump can be
expressed by the following equation:
R
VV
IfC
OL MIN
IN OUT
OUT OSC FLY
()
=≅
21
where f
OSC
is the switching frequency (1.2MHz) and C
FLY
is the value of the fl ying capacitor. The charge pump
will typically be weaker than the theoretical limit due
Figure 3. 10nH Inductor Used for
Additional Input Noise Reduction
APPLICATIO S I FOR ATIO
WUU
U
LTC3240-3.3/
LTC3240-2.5
0.22µF
2.2µF
V
IN
GND
1cm OF WIRE
10nH
V
IN
1
2
3240 F03

LTC3240EDC-3.3#TRMPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 3.3V Step-Up/Step-Down Charge Pump DC/DC Converter
Lifecycle:
New from this manufacturer.
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