REV. A–14–
AD7866
Digital Inputs
The digital inputs applied to the AD7866 are not limited by the
maximum ratings that limit the analog inputs. Instead, the digital
inputs applied can go to 7 V and are not restricted by the V
DD
+
0.3 V limit as on the analog inputs. See maximum ratings.
Another advantage of SCLK, RANGE, REF SELECT, A0, and
CS not being restricted by the V
DD
+ 0.3 V limit is that power
supply sequencing issues are avoided. If one of these digital inputs
is applied before V
DD
, there is no risk of latch-up, as there
would be on the analog inputs if a signal greater than 0.3 V were
applied prior to V
DD
.
V
DRIVE
The AD7866 also has the V
DRIVE
feature, which controls the
voltage at which the serial interface operates. V
DRIVE
allows the
ADC to easily interface to both 3 V and 5 V processors. For
example, if the AD7866 was operated with a V
DD
of 5 V, the
V
DRIVE
pin could be powered from a 3 V supply, allowing a large
dynamic range with low voltage digital processors. For example,
the AD7866 could be used with the 2 V
REF
input range, with a
V
DD
of 5 V while still being able to interface to 3 V digital parts.
REFERENCE CONFIGURATION OPTIONS
The AD7866 has various reference configuration options. The
REF SELECT pin allows the choice of using an internal 2.5 V
reference or applying an external reference, or even an individual
external reference for each on-chip ADC if desired. If the REF
SELECT pin is tied to AGND, then the on-chip 2.5 V reference
is used as the reference source for both ADC A and ADC B. In
addition, pins V
REF
, D
CAP
A, and D
CAP
B must be tied to decoupling
capacitors (100 nF, 470 nF, and 470 nF recommended,
respectively). If the REF SELECT pin is tied to a logic high, an
external reference can be supplied to the AD7866 through the
V
REF
pin to overdrive the on-chip reference, in which case
decoupling capacitors are required on D
CAP
A and D
CAP
B again.
However, if the V
REF
pin is tied to AGND while REF SELECT
is tied to a logic low, an individual external reference can be
applied to both ADC A and ADC B through pins D
CAP
A and
D
CAP
B, respectively. Table II summarizes these reference options.
For specified performance, the last configuration was used with
the same reference voltage applied to both D
CAP
A and D
CAP
B.
The connections for the relevant reference pins are shown in the
typical connection diagrams. If the internal reference is being
used, the V
REF
pin should have a 100 nF capacitor connected to
AGND very close to the V
REF
pin. These connections are shown
in Figure 12.
D
CAP
B
D
CAP
A
V
REF
470nF
AD7866
470nF
100nF
Figure 12. Relevant Connections when Using an
Internal Reference
D
CAP
B
D
CAP
A
V
REF
AD7866
V
REF
REF SELECT
Figure 13. Relevant Connections when Applying
an External Reference at D
CAP
A and/or D
CAP
B
D
CAP
B
D
CAP
A
V
REF
470nF
AD7866
470nF
V
REF
REF SELECT
V
DRIVE
Figure 14. Relevant Connections when Applying
an External Reference at V
REF
Figure 13 shows the connections required when an external
reference is applied to D
CAP
A and D
CAP
B. In this example, the
same reference voltage is applied at each pin; however, a different
voltage may be applied at each of these pins for each on-chip
ADC. An external reference applied at these pins may have a
range from 2 V to 3 V, but for specified performance it must be
within ± 1% of 2.5 V. Figure 14 shows the third option, which is
to overdrive the internal reference through the V
REF
pin. This is
possible due to the series resistance from the V
REF
pin to the
internal reference. This external reference can have a range from
2 V to 3 V; but again, to get as close as possible to the specified
performance, a 2.5 V reference is desirable. D
CAP
A and D
CAP
B
decouple each on-chip reference buffer, as shown in Figure 15.
Table II. Reference Selection
Reference Option REF SELECT V
REF
1
D
CAP
A and D
CAP
B
2
Internal Low Decoupling Capacitor Decoupling Capacitor
Externally through V
REF
High External Reference Decoupling Capacitor
Externally through
D
CAP
A and/or D
CAP
B Low AGND External Reference A and/or
Reference B
NOTES
1
Recommended value of decoupling capacitor = 100 nF.
2
Recommended value of decoupling capacitor = 470 nF.