MAX690RESA+T

MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
3.0V/3.3V Microprocessor Supervisory Circuits
4 _______________________________________________________________________________________
nA
-500 2 500
PFI Input Current
-25 2 25
MIN TYP MAX
ns100 20t
MR
M
R
Pulse Width
V
0.3 x V
CC
V
IH
M
R
Input Threshold
0.7 x V
CC
ns60 500t
MD
M
R
to Reset Delay
µA20 60 350
M
R
Pull-Up Current
V
0.7 x V
CC
V
IH
0.3 x V
CC
V
IL
WDI Input Threshold
1.12 1.60 2.24
ns100 20WDI Pulse Width
V
IL
MAX690_M, MAX802_M,
MAX804_M, MAX805_M
-1 +0.01 +1
-10 +0.01 +10
µAWDI Input Current
MAX690/MAX802/MAX804/
MAX805 only
st
WD
Watchdog Timeout Period
Note 1: V
CC
supply current, logic input leakage, watchdog functionality (MAX690_/802_/805_/804_),
M
R
functionality
(MAX704_/806_), PFI functionality, state of
R
E
S
E
T
(MAX690_/704_/802_/806_), and RESET (MAX804_/805_) tested at
VBATT = 3.6V, and V
CC
= 5.5V. The state of
R
E
S
E
T
or RESET and
P
F
O
is tested at V
CC
= V
CC
min.
Note 2: Tested at VBATT = 3.6V, V
CC
= 3.5V and 0V. The battery current will rise to 10µA over a narrow transition window around
V
CC
= 1.9V.
Note 3: Leakage current into the battery is tested under the worst-case conditions at V
CC
= 5.5V, VBATT = 1.8V and at V
CC
= 1.5V,
VBATT= 1.0V.
Note 4: Guaranteed by design.
Note 5: When V
SW
> V
CC
> VBATT, V
OUT
remains connected to V
CC
until V
CC
drops below VBATT. The V
CC
-to-VBATT comparator
has a small 25mV typical hysteresis to prevent oscillation. For V
CC
< 1.75V (typ), V
OUT
switches to VBATT regardless of the
voltage on VBATT.
Note 6: When VBATT > V
CC
> V
SW
, V
OUT
remains connected to V
CC
until V
CC
drops below the battery switch threshold (V
SW
).
Note 7: V
OUT
switches from VBATT to V
CC
when V
CC
rises above the reset threshold, independent of VBATT. Switchover back to
V
CC
occurs at the exact voltage that causes
R
E
S
E
T
to go high (on the MAX804_/805_, RESET goes low); however
switchover occurs 200ms prior to reset.
Note 8: The reset threshold tolerance is wider for V
CC
rising than for V
CC
falling to accommodate the 10mV typical hysteresis, which
prevents internal oscillation.
Note 9: The leakage current into or out of the RESET pin is tested with RESET asserted (RESET output high impedance).
MAX690_/MAX704_/MAX805_
V
1.187 1.237 1.287
V
PFT
PFI Input Threshold
1.212 1.237 1.262
SYMBOLPARAMETER UNITS
MAX704_/MAX806_ only
MAX704_/MAX806_ only
MAX704_/MAX806_ only,
M
R
= 0V, V
CC
= 3V
0V< V
CC
< 5.5V
MAX704_/MAX806_ only
MAX690_M, MAX704_M, MAX80_ _M
V
CC
< 3.6V
V
PFI
falling
CONDITIONS
MAX690_/MAX802_/MAX804_/MAX805_ only
V
CC
< 3.6V
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX802_C/E, MAX804_C/E,
MAX806_C/E
MAX690_C/E, MAX802_C/E,
MAX804_C/E, MAX805_C/E
MAX690_/MAX802_/MAX804_/MAX805_ only
MAX690_M, MAX704_M, MAX80_ _M
mV
10 25
nA
-500 2 500
PFI Input Current
-25 2 25
V
PFH
PFI Hysteresis, PFI Rising
10 20
MAX690_M, MAX704_M, MAX80_ _M
V
CC
< 3.6V
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_C/E, MAX704_C/E,
MAX80_ _C/E
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, V
CC
= 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, V
CC
= 2.72V to
5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; T
A
= T
MIN
to T
MAX
; unless otherwise noted. Typical values are at T
A
= +25˚C.)
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
3.0V/3.3V Microprocessor Supervisory Circuits
_______________________________________________________________________________________ 5
5
0
–60 –20 60 140
V
CC
-to-V
OUT
ON-RESISTANCE
vs. TEMPERATURE
1
4
MAX690-806 TOC01
TEMPERATURE (°C)
V
CC
-to-V
OUT
ON-RESISTANCE (Ω)
20 100–40 0 8040 120
3
2
V
CC
= 5V
V
CC
= 3.3V
V
CC
= 2.5V
VBATT = 3.0V
180
20
–60 –20 60 140
VBATT-to-V
OUT
ON-RESISTANCE
vs. TEMPERATURE
60
MAX690-806 TOC02
TEMPERATURE (°C)
VBATT-to-V
OUT
ON-RESISTANCE (Ω)
20 100–40 0 8040 120
140
100
V
CC
= 0V
VBATT = 3.3V
VBATT = 3V
VBATT = 2V
VBATT = 5V
50
25
–60 –20 60 140
SUPPLY CURRENT
vs. TEMPERATURE
30
45
MAX690-806 TOC03
TEMPERATURE (°C)
SUPPLY CURRENT (μA)
20 100–40 0 8040 120
40
35
V
CC
= 5V
V
CC
= 3.3V
V
CC
= 2.5V
VBATT = 3V
PFI = GND
MR/WDI FLOATING
10,000
0.1
–60 –20 60 140
BATTERY SUPPLY CURRENT
vs. TEMPERATURE
1
1000
MAX690-806 TOC04
TEMPERATURE (°C)
BATTERY SUPPLY CURRENT (nA)
20 100–40 0 8040 120
100
10
VBATT = 3V
VBATT = 5V
VBATT = 2V
V
CC
= 0V
PFI = GND
1.240
1.230
–60 –20 60 140
PFI THRESHOLD
vs. TEMPERATURE
1.232
1.238
MAX690-806 TOC07
TEMPERATURE (°C)
PFI THRESHOLD (V)
20 100–40 0 8040 120
1.236
1.234
V
CC
= 5V
V
CC
= 3.3V
V
CC
= 2.5V
VBATT = 3.0V
216
196
–60 –20 60 140
RESET TIMEOUT PERIOD
vs. TEMPERATURE
200
212
MAX690-806 TOC05
TEMPERATURE (°C)
RESET TIMEOUT PERIOD (ms)
20 100–40 0 8040 120
208
204
V
CC
= 5V
V
CC
= 3.3V
VBATT = 3.0V
30
10
–60 –20 60 140
RESET-COMPARATOR PROPAGATION
DELAY vs. TEMPERATURE
14
26
MAX690-806 TOC06
TEMPERATURE (°C)
PROPAGATION DELAY (μs)
20 100–40 0 8040 120
22
18
VBATT = 3.0V
100mV OVERDRIVE
__________________________________________Typical Operating Characteristics
(T
A
= +25°C, unless otherwise noted.)
MAX690T/S/R, 704T/S/R, 802T/S/R, 804–806T/S/R
_______________Detailed Description
Reset Output
A microprocessor’s (µP’s) reset input starts the µP in a
known state. These µP supervisory circuits assert reset to
prevent code execution errors during power-up, power-
down, brownout conditions, or a watchdog timeout.
R
E
S
E
T
is guaranteed to be a logic low for 0V < V
CC
<
V
RST
, provided that VBATT is greater than 1V. Without
a backup battery,
R
E
S
E
T
is guaranteed valid for V
CC
> 1V. Once V
CC
exceeds the reset threshold, an
internal timer keeps
R
E
S
E
T
low for the reset timeout
period; after this interval,
R
E
S
E
T
goes high (Figure 2).
If a brownout condition occurs (V
CC
dips below the
reset threshold),
R
E
S
E
T
goes low. Each time
R
E
S
E
T
is asserted, it stays low for the reset timeout period.
Any time V
CC
goes below the reset threshold, the
internal timer restarts.
The watchdog timer can also initiate a reset. See the
Watchdog Input section.
The MAX804_/MAX805_ active-high RESET output is
open drain, and the inverse of the MAX690_/MAX704_/
MAX802_/MAX806_
R
E
S
E
T
output.
Reset Threshold
The MAX690T/MAX704T/MAX805T are intended for
3.3V systems with a ±5% power-supply tolerance and a
10% system tolerance. Except for watchdog faults,
reset will not assert as long as the power supply
remains above 3.15V (3.3V - 5%). Reset is guaranteed
to assert before the power supply falls below 3.0V.
The MAX690S/MAX704S/MAX805S are designed for
3.3V ±10% power supplies. Except for watchdog
faults, they are guaranteed not to assert reset as long
as the supply remains above 3.0V (3.3V - 10%). Reset
is guaranteed to assert before the power supply falls
below 2.85V (V
CC
- 14%).
The MAX690R/MAX704R/MAX805R are optimized for
monitoring 3.0V ±10% power supplies. Reset will not
occur until V
CC
falls below 2.7V (3.0V - 10%), but is
guaranteed to occur before the supply falls below
2.59V (3.0V - 14%).
The MAX802R/S/T, MAX804R/S/T, and MAX806R/S/T
are respectively similar to the MAX690R/S/T,
MAX805R/S/T, and MAX704R/S/T, but with tightened
reset and power-fail threshold tolerances.
3.0V/3.3V Microprocessor Supervisory Circuits
6 _______________________________________________________________________________________
______________________________________________________________Pin Description
1 V
OUT
Supply Output for CMOS RAM. When V
CC
is above the reset threshold, V
OUT
is
connected to V
CC
through a p-channel MOSFET switch. When V
CC
falls below V
SW
and
VBATT, VBATT connects to V
OUT
. Connect to V
CC
if no battery is used.
2 V
CC
Main Supply Input
3 GND Ground
4 PFI
Power-Fail Input. When PFI is less than V
PFT
or when V
CC
falls below V
SW
,
P
F
O
goes
low; otherwise,
P
F
O
remains high. Connect to ground if unused.
7
R
E
S
E
T
Active-Low Reset Output. Pulses low for 200ms when triggered, and stays low whenever
V
CC
is below the reset threshold or when
M
R
is a logic low. It remains low for 200ms after
either V
CC
rises above the reset threshold, the watchdog triggers a reset, or
M
R
goes
from low to high.
M
R
Manual Reset Input. A logic low on
M
R
asserts reset. Reset remains asserted as long as
M
R
is low and for 200ms after
M
R
returns high. This active-low input has an internal
70µA pullup current. It can be driven from a TTL or CMOS logic line, or shorted to ground
with a switch. Leave open if unused.
6 WDI
Watchdog Input. If WDI remains high or low for 1.6s, the internal watchdog timer runs out
and reset is triggered. The internal watchdog timer clears while reset is asserted or when
WDI sees a rising or falling edge. The watchdog function cannot be disabled.
5
P
F
O
Power-Fail Output. When PFI is less than V
PFT
, or V
CC
falls below V
SW
,
P
F
O
goes low;
otherwise,
P
F
O
remains high. Leave open if unused.
8 VBATT
Backup-Battery Input. When V
CC
falls below V
SW
and VBATT, V
OUT
switches from V
CC
to
VBATT. When V
CC
rises above the reset threshold, V
OUT
reconnects to V
CC
. VBATT may
exceed V
CC
. Connect to V
CC
if no battery is used.
RESET Active-High, Open-Drain Reset Output is the inverse of
R
E
S
E
T
.
NAME FUNCTION
MAX690
MAX802
1
2
PIN
3
4
6
5
8
7
MAX804
MAX805
1
2
3
4
7
6
5
8
MAX704
MAX806

MAX690RESA+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Supervisory Circuits MPU Supervisor
Lifecycle:
New from this manufacturer.
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