PCK942PBD,151

1. General description
The PCK942P is a 1 : 18 low voltage clock distribution chip with 2.5 V or 3.3 V LVCMOS
output capabilities. The device is offered in two versions: the PCK942C has an LVCMOS
input clock, while the PCK942P has a LVPECL input clock. The 18 outputs are 2.5 V or
3.3 V LVCMOS compatible and feature the drive strength to drive 50 series-terminated
transmission lines. With output-to-output skews of 200 ps, the PCK942P is ideal as a
clock distribution chip for the most demanding of synchronous systems. The 2.5 V output
also makes the device ideal for supplying clocks for a higher performance Pentium II
microprocessor-based design.
With a low output impedance of approximately 12 , in both the HIGH and LOW logic
states, the output buffers of the PCK942P are ideal for driving series-terminated
transmission lines. With an output impedance of 12 , the PCK942P can drive two
series-terminated transmission lines from each output. This capability gives the PCK942P
an effective fan-out of 1 : 36. The PCK942P provides enough copies of low skew clocks
for most high performance synchronous systems.
The differential LVPECL inputs of the PCK942P allow the device to interface directly with a
LVPECL fan-out buffer like the MC100EP111 to build very wide clock fan-out trees or to
couple to a high frequency clock source. The OE pin will place the outputs to a
high-impedance state. The OE pin has an internal pull-up resistor.
The PCK942P is a single supply device. The V
CC
power pins require either 2.5 V or 3.3 V.
The 32-lead LQFP package was chosen to optimize performance, board space, and cost
of the device. The 32-lead LQFP package has a 7 mm × 7 mm body size with a
conservative 0.8 mm pin spacing.
2. Features
LVPECL clock input
2.5 V LVCMOS outputs for Pentium II microprocessor support
200 ps maximum targeted output-to-output skew
Maximum output frequency of 250 MHz at 3.3 V V
CC
32-lead LQFP packaging
Single 3.3 V or 2.5 V supply voltage
PCK942P
Low voltage 1 : 18 clock distribution chip
Rev. 01 — 17 February 2006 Product data sheet
9397 750 12261 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 01 — 17 February 2006 2 of 11
Philips Semiconductors
PCK942P
Low voltage 1 : 18 clock distribution chip
3. Ordering information
4. Functional diagram
5. Pinning information
5.1 Pinning
Table 1: Ordering information
Type number Package
Name Description Version
PCK942PBD LQFP32 plastic low profile quad flat package; 32 leads;
body 7 × 7 × 1.4 mm
SOT358-1
Fig 1. Functional diagram of PCK942P
002aaa674
PCK942P
Q0
Q1 to Q16
Q17
OE
(internal pull-up)
PECL_CLK
PECL_CLK
Fig 2. Pin configuration for LQFP32
PCK942PBD
GND Q6
GND Q7
OE Q8
n.c. V
CC
PECL_CLK Q9
PECL_CLK Q10
V
CC
Q11
V
CC
GND
Q17 Q0
Q16 Q1
Q15 Q2
GND V
CC
Q14 Q3
Q13 Q4
Q12 Q5
V
CC
GND
002aaa675
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
9397 750 12261 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 01 — 17 February 2006 3 of 11
Philips Semiconductors
PCK942P
Low voltage 1 : 18 clock distribution chip
5.2 Pin description
6. Functional description
6.1 Function table
7. Limiting values
Table 2: Pin description
Symbol Pin Description
GND 1, 2, 12, 17, 25 ground
OE 3 output enable
n.c. 4 not connected
PECL_CLK,
PECL_CLK
5, 6 differential clock inputs
Q[0:17] 32, 31, 30, 28, 27, 26,
24, 23, 22, 20, 19, 18,
15, 14, 13, 11, 10, 9
outputs
V
CC
7, 8, 16, 21, 29 supply voltage
Table 3: Function table
OE Output
0 high-impedance
1 outputs enabled
Table 4: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.3 +3.6 V
V
I
input voltage 0.3 V
DD
+ 0.3 V
I
I
input current CMOS inputs - ±20 mA
T
stg
storage temperature 40 +125 °C

PCK942PBD,151

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC CLK BUFFER 1:18 250MHZ 32LQFP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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