SSL8516T All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 1 — 5 May 2014 9 of 33
NXP Semiconductors
SSL8516T
Greenchip PFC and flyback controller
Operating near the PFC OVP level causes the PFC stage on-time to decrease rapidly to
zero.
To reduce the response time, in case of load variation, the PFCCOMP pin is clamped to a
minimum level of 1.19 V during PFC operation. Clamping prevents the on-time increasing
too much and improves the PFC response time when the load decreases again.
7.2.2 Valley switching and demagnetization (PFCAUX pin)
The PFC MOSFET is switched on after the transformer is demagnetized. Internal circuitry
connected to the PFCAUX pin detects the end of the secondary stroke. It also detects the
voltage across the PFC MOSFET. To reduce switching losses and
ElectroMagnetic Interference (EMI), the next stroke is started when the voltage across the
PFC MOSFET is at its minimum (valley switching).
If a demagnetization signal is not detected on the PFCAUX pin, the controller generates a
Zero-Current Signal (ZCS) 48 s after the last PFC MOSFET gate signal.
If valley signal is not detected on the PFCAUX pin, the controller generates a valley signal
4.2 s after demagnetization is detected.
To protect the internal circuitry during, for example, lightning events, add a 5 k series
resistor to the PFCAUX pin. To prevent incorrect switching due to external interference,
place the resistor close to the IC on the PCB.
7.2.3 Frequency limitation
To optimize the transformer and minimize switching losses, the switching frequency is
limited to f
sw(PFC)max
. If the frequency for quasi-resonant operation is above the f
sw(PFC)max
limit, the system switches to DCM. The PFC MOSFET is only switched on at a minimum
voltage across the switch (valley switching).
7.2.4 Mains voltage compensation (VINSENSE pin)
The equation for the transfer function of a power factor corrector contains the square of
the mains input voltage. In a typical application, it results in a low bandwidth for low mains
input voltages.
To compensate for the influence of the mains input voltage, the SSL8516T contains a
correction circuit. The average input voltage is measured using the VINSENSE pin and
the information is fed to an internal compensation circuit. Using this compensation, it is
possible to keep the regulation loop bandwidth constant over the mains input range. This
feature gives a fast transient response on load steps while complying with class-C MHR
requirements.
In a typical application, a resistor and two capacitors connected to the PFCCOMP pin set
the regulation loop bandwidth.
7.2.5 Soft-start (PFCSENSE pin)
To prevent audible transformer noise at start-up or during hiccup, the soft-start function
slowly increases the transformer peak current. Place a capacitor C
SS1
in parallel with
resistor R
SS1
(see Figure 5) to implement a soft-start function. An internal current source
charges the capacitor to:
(1)
V
PFCSEN SE
I
start softPFC
R
SS1
=
