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AD7828CQ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
REV. F
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
a
LC
2
MOS High Speed
4- and 8-Channel 8-Bit ADCs
AD7824/AD7828
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
FUNCTIONAL BLOCK DIAGRAM
RDY
CS
RD
INT
DB3
DB2
DB1
DB0
DB7
DB6
DB5
DB4
THREE-
STATE
DRIVERS
4-BIT
FLASH
ADC
(4LSB)
V
REF
(+)
16
TIMING AND CONTROL
CIRCUITRY
ADDRESS
LATCH
DECODE
AIN1
AIN4
AIN8
MUX*
*AD7824 – 4-CHANNEL MUX
**AD7828 – 8-CHANNEL MUX
A2 – AD7828 ONLY
A0 A1 A2**
V
REF
(+)
V
REF
(–)
4-BIT
FLASH
ADC
(4MSB)
4-BIT
DAC
FEATURES
4 or 8 Analog Input Channels
Built-In Track-and-Hold Function
10 kHz Signal Handling on Each Channel
Fast Microprocessor Interface
Single 5 V Supply
Low Power: 50 mW
Fast Conversion Rate: 2.5 ␮s/Channel
Tight Error Specification: 1/2 LSB
GENERAL DESCRIPTION
The AD7824 and AD7828 are high speed, multichannel, 8-bit
ADCs with a choice of four (AD7824) or eight (AD7828)
multi-
plexed analog inputs. A half-flash conversion technique gives a fast
conversion rate of 2.5 µs per channel, and the parts have a built-in
track-and-hold function capable of digitizing full-scale signals of
10 kHz (157 mV/µs slew rate) on all channels. The AD7824 and
AD7828 operate from a single 5 V supply and have an analog input
range of 0 V to 5 V, using an external 5 V reference.
Microprocessor interfacing of the parts is simple, using standard
Chip Select (CS) and Read (RD) signals to initiate the conversion
and read the data from the three-state data outputs. The half-flash
conversion technique means that there is no need to generate a
clock signal for the ADC. The AD7824 and AD7828 can be
interfaced easily to most popular microprocessors.
The AD7824 and AD7828 are fabricated in an advanced, all
ion-implanted, linear compatible CMOS process (LC
2
MOS) and
have low power dissipation of 40 mW (typ). The AD7824 is
available in a 0.3" wide, 24-lead “skinny” DIP, while the AD7828
is available in a 0.6" wide, 28-lead DIP and in 28-terminal
surface-
mount packages.
PRODUCT HIGHLIGHTS
1. 4- or 8-channel input multiplexer gives cost effective,
space-saving multichannel ADC system.
2. Fast conversion rate of 2.5 µs/channel features a per-channel
sampling frequency of 100 kHz for the AD7824 or 50 kHz
for the AD7828.
3.
Built-in track-and-hold function allows handling of four or
eight channels up to 10 kHz bandwidth (157 mV/µs slew rate).
4. Tight total unadjusted error spec and channel-to-channel
matching eliminate the need for user trims.
5. Single 5 V supply simplifies system power requirements.
6. Fast, easy-to-use digital interface allows connection to most
popular microprocessors with minimal external components.
No clock signal is required for the ADC.
REV. F
–2–
AD7824/AD7828–SPECIFICATIONS
(V
DD
= 5 V, V
REF
(+) = 5 V, V
REF
(–) = GND = O V, unless otherwise
noted. All specifications T
MIN
to T
MAX
, unless otherwise noted. Specifications apply to Mode 0.)
Parameter K Version
1
L Version B, T Versions C, U Versions Unit Conditions/Comments
ACCURACY
Resolution 8 8 8 8 Bits
Total Unadjusted Error
2
± 1 ± 1/2 ± 1 ± 1/2 LSB max
Minimum Resolution for which
No Missing Codes Are Guaranteed 8 8 8 8 Bits
Channel-to-Channel Mismatch ± 1/4 ± 1/4 ± 1/4 ± 1/4 LSB max
REFERENCE INPUT
Input Resistance 1.0/4.0 1.0/4.0 1.0/4.0 1.0/4.0 kΩ min/kΩ max
V
REF
(+) Input Voltage Range V
REF
(–)/ V
REF
(–)/ V
REF
(–)/ V
REF
(–)/ V min/V max
V
DD
V
DD
V
DD
V
DD
V
REF
(–) Input Voltage Range GND/ GND/ GND/ GND/ V min/V max
V
REF
(+) V
REF
(+) V
REF
(+) V
REF
(+)
ANALOG INPUT
Input Voltage Range V
REF
(–)/ V
REF
(–)/ V
REF
(–)/ V
REF
(–)/ V min/V max
V
REF
(+) V
REF
(+) V
REF
(+) V
REF
(+)
Input Leakage Current ± 3 ± 3 ± 3 ± 3 µA max Analog Input Any Channel
Input Capacitance
3
45 45 45 45 pF typ 0 V to 5 V
LOGIC INPUTS
RD, CS, A0, A1, and A2
V
INH
2.4 2.4 2.4 2.4 V min
V
INL
0.8 0.8 0.8 0.8 V max
I
INH
111 1 µA max
I
INL
–1 –1 –1 –1 µA max
Input Capacitance
3
8888pF max Typically 5 pF
LOGIC OUTPUTS
DB0–DB7 and INT
V
OH
4.0 4.0 4.0 4.0 V min I
SOURCE
= 360 µA
V
OL
0.4 0.4 0.4 0.4 V max I
SINK
= 1.6 mA
I
OUT
(DB0–DB7) ± 3 ± 3 ± 3 ± 3 µA max Floating State Leakage
Output Capacitance
3
8888pF max Typically 5 pF
RDY
V
OL
4
0.4 0.4 0.4 0.4 V max I
SINK
= 2.6 mA
I
OUT
± 3 ± 3 ± 3 ± 3 µA max Floating State Leakage
Output Capacitance 8 8 8 8 pF max Typically 5 pF
SLEW RATE, TRACKING
3
0.7 0.7 0.7 0.7 V/µs typ
0.157 0.157 0.157 0.157 V/µs max
POWER SUPPLY
V
DD
555 5 V ± 5% for Specified
Performance
I
DD
5
16 16 20 20 mA max CS = RD = 2.4 V
Power Dissipation 50 50 50 50 mW typ
80 80 100 100 mW max
Power Supply Sensitivity ± 1/4 ± 1/4 ± 1/4 ± 1/4 LSB max ± 1/16 LSB typ
V
DD
= 5 V ± 5%
NOTES
1
Temperature ranges are as follows: K, L Versions: 0°C to 70°C
B, C Versions: –40°C to +85°C
T, U Versions: –55°C to +125°C
2
Total Unadjusted Error includes offset, full-scale and linearity errors.
3
Sample tested at 25°C by Product Assurance to ensure compliance.
4
RDY is an open-drain output.
5
See Typical Performance Characteristics.
Specifications subject to change without notice.
AD7824/AD7828
REV. F
–3–
TIMING CHARACTERISTICS
1
(V
DD
= 5 V; V
REF
(+) = 5 V; V
REF
(–) = GND = 0 V, unless otherwise noted.)
Limit at 25ⴗC Limit at T
MIN
, T
MAX
Limit at T
MIN
, T
MAX
Parameter (All Grades) (K, L, B, C Grades) (T, U Grades) Unit Conditions/Comments
t
CSS
00 0 ns min CS to RD Setup Time
t
CSH
00 0 ns min CS to RD Hold Time
t
AS
00 0 ns min Multiplexer Address Setup Time
t
AH
30 35 40 ns min Multiplexer Address Hold Time
t
RDY
2
40 60 60 ns max CS to RDY Delay. Pull-Up
Resistor 5 kΩ.
t
CRD
2.0 2.4 2.8 µs max Conversion Time, Mode 0
t
ACC1
3
85 110 120 ns max Data Access Time after RD
t
ACC2
3
50 60 70 ns max Data Access Time after INT, Mode 0
t
lNTH
2
40 65 70 ns typ RD to INT Delay
75 100 100 ns max
t
DH
4
60 70 70 ns max Data Hold Time
t
P
500 500 600 ns min Delay Time between Conversions
t
RD
60 80 80 ns min Read Pulsewidth, Mode 1
600 500 400 ns max
NOTES
1
Sample tested at 25°C to ensure compliance. All input control signals are specified with t
RISE
= t
FALL
= 20 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
2
C
L
= 50 pF.
3
Measured with load circuits of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
4
Defined as the time required for the data lines to change 0.5 V when loaded with the circuits of Figure 2.
Specifications subject to change without notice.
Test Circuits
DBN
3k⍀ 100pF
DGND
a. High-Z to V
OH
DBN
3k⍀
100pF
DGND
5V
b. High-Z to V
OL
Figure 1. Load Circuits for Data Access Time Test
DBN
3k⍀ 10pF
DGND
a. V
OH
to High-Z
DBN
3k⍀
10pF
DGND
5V
b. V
OL
to High-Z
Figure 2. Load Circuits for Data Hold Time Test
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AD7828CQ

Mfr. #:
Buy AD7828CQ
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC High Spd 8-Ch 8-Bit CMOS
Lifecycle:
New from this manufacturer.
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