MAX3325EAI+T

MAX3325
3V Dual RS-232 Transceiver with
LCD Supply and Contrast Controller
_______________________________________________________________________________________ 7
C4
0.22µF
C5
0.22µF
UP
C1
0.22µF
C1+
C1-
C2+
C2-
GND
C2
0.22µF
V
DD
V+
LCD
FB
DAC
REF+
REF-
TEMP
REG
V-
DOWN
MAX3325
0.22µF
0.47µF
R
FB
R
OUT
R
REF+8
*
R
REF-
*
R
TEMP
C3
0.22µF
4.7µF
0.22µF
10k
T1IN
T2IN
V
L
C
L
R
L
C
L
R
L
0.22µF
0.22µF
6-BIT
DAC
SDLCD
SD232
T1OUT
R1OUT
R2OUT
5k
5k
T2OUT
R1IN
R2IN
LCD
DISPLAY
*RESISTORS R
REF
+ AND R
REF
- ARE BOTH SHOWN, BUT ONLY ONE OR THE OTHER IS USED IN APPLICATION.
Figure 1. Application Circuit
Detailed Description
Dual Charge-Pump Voltage Converter
The MAX3325’s internal power supply consists of a reg-
ulated dual charge pump that provides output voltages
of +5.5V (doubling charge pump) and -5.5V (inverting
charge pump) over the 3.0V to 3.6V V
DD
range. The
charge pump operates in discontinuous mode; if the
output voltages are less than 5.5V, the charge pump is
enabled; if the output voltages exceed 5.5V, the charge
pump is disabled. Each charge pump requires a flying
capacitor (C1, C2) and a reservoir capacitor (C3, C4)
to generate the V+ and V- supplies (Figure 1).
RS-232 Transmitters
The transmitters are inverting level translators that con-
vert logic levels to ±5.0V EIA/TIA-232 levels. The
MAX3325 transmitters guarantee a 250kbps data rate
with worst-case loads of 3k in parallel with 1000pF,
providing compatibility with PC-to-PC communication
software (such as LapLink™).
The MAX3325’s transmitters are disabled and the out-
puts are forced into a high-impedance state when the
RS-232 circuitry is in shutdown (SD232 = low). The
MAX3325 permits the outputs to be driven up to ±13V
in shutdown.
The transmitter inputs do not have pull-up resistors.
Connect unused inputs to GND or V
DD
.
RS-232 Receivers
The receivers convert RS-232 signals to logic output
levels. The V
L
pin controls the logic output high voltage.
The receiver outputs are always active, regardless of
the shutdown state.
Positive Voltage Regulator
The MAX3325 has a regulated +5V output suitable for
powering +5V LCD modules or other circuits. The out-
put of the boost charge pump is regulated with an LDO
linear regulator. The REG output sources up to 11mA of
current to external circuitry.
Adjustable LCD Supply
The LCD output provides a flexible output voltage to
adjust the contrast of LCD modules. The output voltage
range is determined by the external circuitry connected
to LCD, FB, DAC, REF+ (or REF-, depending on con-
trast polarity). Additionally, the TEMP output can be
used to automatically compensate the contrast adjust-
ment for temperature variance.
The LCD output is a linear regulator powered by the neg-
ative charge pump. It is capable of sinking up to 3mA of
current. Although the LCD regulator can be adjusted to
positive voltages, it is not capable of sourcing current. A
minimum output current of 100µA is required.
6-Bit DAC
The MAX3325’s DAC output is an unbuffered inverted
R2R structure with an output voltage range of 0 to
+1.2V. The DAC output impedance is typically 50k,
and can be connected through a series resistor to the
FB input of the LCD regulator. An internal power-on
reset circuit sets the DAC to midscale on power-up.
DAC Control Inputs
The DAC code is controlled by UP and DOWN to adjust
the contrast of the LCD module. These inputs are
intended to interface to digital signals, but do not
include debounce circuitry. See the
Applications
sec-
tion. See Table 1 for the truth table.
Temperature Compensation
The MAX3325’s TEMP output is used to minimize devia-
tion in LCD contrast level due to temperature changes.
The TEMP output is capable of sinking or sourcing up
to 22µA to the external resistor network.
Shutdown Mode
Supply current falls below 1µA in shutdown mode
(SDLCD = SD232 = low). When shut down, the device’s
charge pumps are shut off, V+ is pulled down to V
DD
,
V- is pulled to ground, and the transmitter outputs are
disabled (high impedance). The LCD section is also
powered down. The REG, LCD, and both reference out-
puts become high impedance. The time required to exit
shutdown is typically 100µs, as shown in the
Typical
Operating Characteristics
. However, the TEMP output
requires 50ms to fully stabilize. Connect SDLCD and
SD232 to V
DD
if the shutdown mode is not used. See
Table 2.
MAX3325
3V Dual RS-232 Transceiver with
LCD Supply and Contrast Controller
8 _______________________________________________________________________________________
LapLink is a trademark of Traveling Software.
X = Don’t care
Table 1. DAC Truth Table
Table 2. Shutdown Truth Table
UP
0
1
DOWN
0
1
FUNCTION
DAC set to midscale
DAC register decrements 1 count
DAC register increments 1 count
SDLCD
0
1
X
SD232
0
X
1
FUNCTION
Low-power shutdown mode
LCD bias and REG outputs enabled
RS-232 transmitters enabled
Applications Information
Capacitor Selection
The capacitor type used for C1–C4 is not critical for
proper operation; polarized or nonpolarized capacitors
can be used. Ceramic chip capacitors with an X7R
dielectric provide the best combination of performance,
cost, and size. The charge pump requires 0.22µF
capacitors for 3.3V operation. Do not use values small-
er than those listed in Figure 1. Increasing the capacitor
values (e.g., by a factor of 2) reduces ripple on the
transmitter outputs, slightly reduces power consump-
tion, and increases the available output current from
V
REG
and V
LCD
. C2, C3, and C4 can be increased
without changing C1’s value. However, do not
increase C1 without also increasing the values of
C2, C3, C4, and C5 to maintain the proper ratios.
When using the minimum required capacitor values,
make sure the capacitor value does not degrade exces-
sively with temperature or voltage. This is typical of Y5V
and Z5U dielectric ceramic capacitors. If in doubt, use
capacitors with a larger nominal value, or specify X7R
dielectric. The capacitor’s equivalent series resistance
(ESR), which usually rises at low temperatures, influences
the amount of ripple on V+ and V-.
Power-Supply Decoupling
In most circumstances, a 0.22µF V
DD
bypass capacitor
(C5) is adequate. Choosing larger values for C5
increases performance and decreases the induced rip-
ple on the V
DD
supply line. Note that capacitor C2, con-
nected to V+, is returned to C5. This connection also
improves the performance of the MAX3325. Locate all
bypass capacitors as close as possible to the IC. Keep
metal traces as wide as possible. Return all capacitor
ground connections directly to a solid-copper ground
plane.
Transmitter Outputs
when Exiting Shutdown
The
Typical Operating Characteristics
show the
MAX3325 transmitter outputs when exiting shutdown
mode. As they become active, the two transmitter out-
puts are shown going to opposite RS-232 levels (one
transmitter input is high, the other is low). Each trans-
mitter is loaded with 3k in parallel with 2500pF. The
transmitter outputs display no ringing or undesirable
transients as they come out of shutdown. Note that the
transmitters are enabled only when the magnitude of V-
exceeds approximately -3V.
High Data Rates
The MAX3325 maintains the RS-232 ±5.0V minimum
transmitter output voltage even at high data rates.
Figure 1 shows a transmitter loopback test circuit. The
Typical Operating Characteristics
show loopback test
results at 120kbps and 250kbps. For 120kbps, all trans-
mitters were driven simultaneously at 120kbps into RS-
232 loads in parallel with 1000pF. For 250kbps, a single
transmitter was driven at 250kbps, and all transmitters
were loaded with an RS-232 receiver in parallel with
1000pF.
Interconnection with
Lower Logic Voltages
The MAX3325 provides a separate supply for the logic
interface to optimize input and output levels. Connect
V
L
to the system’s logic supply voltage, and bypass it
with a 0.1µF capacitor to GND. If the logic supply is the
same as V
DD
, connect V
L
to V
DD
. The V
L
pin can be
operated from +1.8V to +5.0V to accommodate various
logic levels.
Setting V
LCD
Output Voltage
The LCD output can be configured in a variety of ways
to suit the requirements of the LCD display. First, deter-
mine the nominal voltage range that the LCD will
require for adequate contrast adjustment. If the display
requires temperature compensation for contrast,
include the TEMP output in all calculations. The output
voltage is defined by:
where code is the current digital code in the DAC, and
R
O
is the nominal DAC output impedance (50k). The
other terms in the equation are due to external resis-
tances connected to the indicated pins. A spreadsheet
program is an excellent tool for helping to select compo-
nents and evaluate their effect on the output voltage
range.
Although the above equation has terms for both REF+
and REF- offset resistors, only one or the other is used.
Design Example
The first step in designing for a particular display is to
obtain the manufacturer’s device specifications for the
nominal values as well as the temperature characteristics.
For example, consider the Optrex DMC series of dot
matrix LCD modules. The manufacturer specifies a nomi-
nal contrast bias voltage of 6V at +25°C, where bias volt-
age is V
REG
- V
LCD
. The temperature coefficient needed
V =-R
code V
R + R
V
R
V
R
-3.3V - V (T - 25 C)
R
LCD FB
DAC
O DAC
REF+
REF+
REF-
REF-
TEMP
TEMP
()
++
+
°
MAX3325
3V Dual RS-232 Transceiver with
LCD Supply and Contrast Controller
_______________________________________________________________________________________ 9

MAX3325EAI+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
RS-232 Interface IC 3V Dual Tcvr w/LCD S&C Controller
Lifecycle:
New from this manufacturer.
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