© 2000 Fairchild Semiconductor Corporation DS009461 www.fairchildsemi.com
March 1988
Revised September 2000
74F14 Hex Inverter Schmitt Trigger
74F14
Hex Inverter Schmitt Trigger
General Description
The 74F14 contains six logic inverters which accept stan-
dard TTL input signals and provide standard TTL output
levels. They are capable of transforming slowly changing
input signals into sharply defined, jitter-free output signals.
In addition, they have a greater noise margin than conven-
tional inverters.
Each circuit contains a Schmitt trigger followed by a Dar-
lington level shifter and a phase splitter driving a TTL
totem-pole output. The Schmitt trigger uses positive feed
back to effectively speed-up slow input transition, and pro-
vide different input threshold voltages for positive and neg-
ative-going transitions. This hysteresis between the
positive-going and negative-going input thresholds (typi-
cally 800 mV) is determined internally by resistor ratios and
is essentially insensitive to temperature and supply voltage
variations.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Unit Loading/Fan Out Function Table
H = HIGH Voltage Level
L = LOW Voltage Level
Order Number Package Number Package Description
74F14SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F14SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F14PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
U.L.
Input I
IH
/I
IL
HIGH/LOW
Output I
OH
/I
OL
I
n
Input 1.0/1.0 20 µA/−0.6 mA
O
n
Output 50/33.3 −1 mA/20 mA
Input Output
AO
LH
HL