LTC4358IDE#TRPBF

LTC4358
7
4358fa
APPLICATIONS INFORMATION
ORing Two Supply Outputs
Where LTC4358s are used to combine the outputs of two
supplies, the power supply with the highest output voltage
sources most or all of the current. If this supplys output
is quickly shorted to ground while delivering load current,
the current temporarily reverses and fl ows backwards
through the LTC4358. When reverse current fl ows the
LTC4358 ideal diode is quickly turned off.
If the other initially lower supply was not delivering load
current at the time of the fault, the output falls until the
LTC4358 body diode conducts. Meanwhile, the internal
amplifi er turns on the MOSFET until the forward drop is
reduced to 25mV. If instead this supply was delivering
load current at the time of the fault, its ORing MOSFET
was already driven at least partially on, and will be driven
harder in an effort to maintain a drop of 25mV.
Load Sharing
Figure 1 combines the outputs of multiple, redundant
supplies using a simple technique known as droop sharing.
Load current is fi rst taken from the highest output, with the
low outputs contributing as the output voltage falls under
increased loading. The 25mV regulation technique ensures
smooth load sharing between outputs without oscillation.
The degree of sharing depends on the 20mΩ resistance
of the LTC4358 internal MOSFET, the output impedance
of the supplies and their initial output voltages.
LTC4358
GND
IN
PS1
DRAIN
V
DD
OUTRTNA
V
INA
= 12V
12V BUS
LTC4358
GND
IN DRAIN
V
DD
OUT
PS2
RTNB
V
INB
= 12V
PS3
RTNC
V
INC
= 12V
4358 F01
LTC4358
GND
IN DRAIN
V
DD
OUT
Figure 1. Droop Sharing Redundant Supplies
LTC4358
8
4358fa
APPLICATIONS INFORMATION
Figure 3. –12V Reverse Input Protection
LTC4358
GND
IN DRAIN
V
DD
OUT
V
IN
= 12V
C
LOAD
C1
0.1μF
R1
100Ω
V
OUT
12V
5A
4358 F03
MMBD1205
V
DD
Hold-Up Circuit
In the event of an input short, parasitic inductance between
the input supply of the LTC4358 and the load bypass
capacitor may cause V
DD
to glitch below its minimum
operating voltage. This causes the turn-off time (t
OFF
) to
increase. To preserve the fast turn-off time, local output
bypassing of 39μF or more is suffi cient or a 100Ω, 0.1μF
RC hold-up circuit on the V
DD
pin can be used as shown
in Figure 2a and Figure 2b.
Layout Considerations
The following advice should be considered when laying out
a printed circuit board for the LTC4358: The OUT pin should
Figure 2. Two Methods of Protecting Against Collapse
of V
DD
From Input Short and Stray Inductance
4358 F02
LTC4358
GND
IN DRAIN
V
DD
OUT
V
IN
= 12V
LTC4358
GND
IN DRAIN
V
DD
OUT
V
IN
= 12V
R1
1007
C1
0.1MF
C
BYPASS
39MF
V
OUT
V
OUT
(a)
(b)
be connected as closely as possible to the EXPOSED PAD
(drain of the MOSFET) for good accuracy. Keep the traces
to the IN and DRAIN wide and short. The PCB traces as-
sociated with the power path through the MOSFET should
have low resistance. See Figure 4.
The DRAIN acts as a heatsink to remove the heat from the
device. For a single layer PCB with the DFN package, use
Figure 5 to determine the PCB area needed for a speci-
ed maximum current and ambient temperature. If using
a two sided PCB, the maximum current is increased by
10%. If the FE package is used, the maximum current is
increased by 4%.
LTC4358
9
4358fa
DIODE CURRENT (A)
3.5
AREA (INCH
2
)
4.5
10
4358 F05
0.1
1
4.0 6.56.0
5.5
5.0
3.0
85oC 70oC 25oC
T
A
=
50oC
Figure 5. Maximum Diode Current vs PCB Area
APPLICATIONS INFORMATION
V
IN
GND
V
OUT
Figure 4. DFN Layout Considerations for 1” × 1” Single Sided PCB

LTC4358IDE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Management Specialized - PMIC 5A Ideal Diode, Integrated FET
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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