CAT5221
http://onsemi.com
3
Table 1. PIN DESCRIPTION
Pin (SOIC) Name Function
1 R
W0
Wiper Terminal for Potentiometer 0
2 R
L0
Low Reference Terminal for Potentiometer 0
3 R
H0
High Reference Terminal for Potentiometer 0
4 A0 Device Address, LSB
5 A2 Device Address
6 R
W1
Wiper Terminal for Potentiometer 1
7 R
L1
Low Reference Terminal for Potentiometer 1
8 R
H1
High Reference Terminal for Potentiometer 1
9 SDA Serial Data Input/Output
10 GND Ground
11 NC No Connect
12 NC No Connect
13 NC No Connect
14 SCL Bus Serial Clock
15 A3 Device Address
16 A1 Device Address
17 NC No Connect
18 NC No Connect
19 NC No Connect
20 V
CC
Supply Voltage
PIN DESCRIPTION
SCL: Serial Clock
The CAT5221 serial clock input pin is used to clock all
data transfers into or out of the device.
SDA: Serial Data
The CAT5221 bidirectional serial data pin is used to
transfer data into and out of the device. The SDA pin is an
open drain output and can be wire-Or’d with the other open
drain or open collector outputs.
A0, A1, A2, A3: Device Address Inputs
These inputs set the device address when addressing
multiple devices. A total of sixteen devices can be addressed
on a single bus. A match in the slave address must be made
with the address input in order to initiate communication
with the CAT5221.
R
H
, R
L
: Resistor End Points
The two sets of R
H
and R
L
pins are equivalent to the
terminal connections on a mechanical potentiometer.
R
W
: Wiper
The two R
W
pins are equivalent to the wiper terminal of
a mechanical potentiometer.
DEVICE OPERATION
The CAT5221 is two resistor arrays integrated with I
2
C
serial interface logic, two 6-bit wiper control registers and
eight 6-bit, non-volatile memory data registers. Each
resistor array contains 63 separate resistive elements
connected in series. The physical ends of each array are
equivalent to the fixed terminals of a mechanical
potentiometer (R
H
and R
L
). R
H
and R
L
are symmetrical and
may be interchanged. The tap positions between and at the
ends of the series resistors are connected to the output wiper
terminals (R
W
) by a CMOS transistor switch. Only one tap
point for each potentiometer is connected to its wiper
terminal at a time and is determined by the value of the wiper
control register. Data can be read or written to the wiper
control registers or the non-volatile memory data registers
via the I
2
C bus. Additional instructions allow data to be
transferred between the wiper control registers and each
respective potentiometer’s non-volatile data registers. Also,
the device can be instructed to operate in an “increment/
decrement” mode.
