23S05T-1DCG

1
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT23S05T
2.5V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE
APRIL 2012
2012 Integrated Device Technology, Inc. DSC 6397/11c
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
Phase-Lock Loop Clock Distribution
10MHz to 133MHz operating frequency
Distributes one clock input to one bank of five outputs
Zero Input-Output Delay
Output Skew < 250ps
Low jitter <200 ps cycle-to-cycle
No external RC network required
Operates at 2.5V VDD
Power down mode
Spread spectrum compatible
Available in SOIC package
FUNCTIONAL BLOCK DIAGRAM
IDT23S05T
2.5V ZERO DELAY CLOCK
BUFFER, SPREAD SPECTRUM
COMPATIBLE
PLL
8
CLK1
CLK2
CLK3
CLK4
Control
Logic
REF
CLKOUT
1
3
2
5
7
DESCRIPTION:
The IDT23S05T is a high-speed phase-lock loop (PLL) clock buffer,
designed to address high-speed clock distribution applications. The zero
delay is achieved by aligning the phase between the incoming clock and
the output clock, operable within the range of 10 to 133MHz.
The IDT23S05T is an 8-pin version of the IDT23S09T. IDT23S05T
accepts one reference input, and drives out five low skew clocks. All parts
have on-chip PLLs which lock to an input clock on the REF pin. The PLL
feedback is on-chip and is obtained from the CLKOUT pad. In the absence
of an input clock, the IDT23S05T enters power down. In this mode, the
device will draw less than 12μA for Commercial Temperature Range and
and less than 25μA for Industrial temperature range, the outputs are tri-
stated, and the PLL is not running, resulting in a significant reduction of
power. The IDT23S05T is characterized for both Industrial and Commer-
cial operation.
NOTE: EOL for non-green parts to occur on 5/13/10 per
PDN U-09-01
2
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT23S05T
2.5V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE
REF
CLK1
2
3
4
8
7
6
5
1
CLK2
GND
CLKOUT
CLK4
V
DD
CLK3
PIN CONFIGURATION
SOIC
TOP VIEW
Symbol Rating Max. Unit
VDD Supply Voltage Range –0.5 to +4.6 V
VI
(2)
Input Voltage Range (REF) –0.5 to +5.5 V
V
I Input Voltage Range –0.5 to V
(except REF) VDD+0.5
IIK (VI < 0) Input Clamp Current 50 mA
IO (VO = 0 to VDD) Continuous Output Current ±50 mA
VDD or GND Continuous Current ±100 mA
T
A = 55°C Maximum Power Dissipation 0.7 W
(in still air)
(3)
TSTG Storage Temperature Range –65 to +150 ° C
Operating Commercial 0 to +70 °C
Temperature Industrial –40 to +85
NOTES:
1. Weak pull down.
2. Weak pull down on all outputs.
PIN DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
(1)
APPLICATIONS:
SDRAM
Telecom
Datacom
PC Motherboards/Workstations
Critical Path Delay Designs
Pin Name Pin Number Type Functional Description
REF
(1)
1 I N Input reference clock, 3.3V tolerant input
CLK2
(2)
2 Out Output clock
CLK1
(2)
3 Out Output clock
GND 4 Ground Ground
CLK3
(2)
5 Out Output clock
VDD 6 PWR 2.5V Supply
CLK4
(2)
7 Out Output clock
CLKOUT
(2)
8 Out Output clock, internal feedback on this pin
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output
clamp-current ratings are observed.
3. The maximum package power dissipation is calculated using a junction temperature
of 150°C and a board trace length of 750 mils.
3
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT23S05T
2.5V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE
Symbol Parameter Min. Max. Unit
VDD Supply Voltage 2.3 2.7 V
TA Operating Temperature (Ambient Temperature) Commercial 0 +70 °C
Industrial 40 +85
CL Load Capacitance 10MHz - 133MHz 15 pF
C
IN Input Capacitance 7 pF
OPERATING CONDITIONS
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Conditions Min. Max. Unit
VIL Input LOW Voltage Level 0.7 V
VIH Input HIGH Voltage Level 1.7 V
IIL Input LOW Current VIN = 0V 50 µA
IIH Input HIGH Current VIN = VDD 100 µA
VOL Output LOW Voltage Standard Drive, IOL = 8mA 0.3 V
VOH Output HIGH Voltage Standard Drive, IOH = -8mA 2 V
IDD_PD Power Down Current REF = 0MHz Commercial 12 µA
Industrial 25
IDD Supply Current Unloaded Outputs at 66.66MHz 32 mA
SWITCHING CHARACTERISTICS
(1,2)
Symbol Parameter Conditions Min. Typ. Max. Unit
t1 Output Frequency 15pF Load 10 133 MHz
Duty Cycle = t2 ÷ t1 Measured at VDD/2, FOUT = 66.66MHz 40 50 60 %
t3 Rise Time Measured between 0.7V and 1.7V 2.5 ns
t4 Fall Time Measured between 0.7V and 1.7V 2.5 ns
t5 Output to Output Skew All outputs equally loaded 250 ps
t6 Delay, REF Rising Edge to CLKOUT Rising Edge Measured at VDD/2 0 ±350 ps
t7 Device-to-Device Skew Measured at VDD/2 on the CLKOUT pins of devices 0 700 ps
tJ Cycle-to-Cycle Jitter, pk - pk Measured at 66.66MHz, loaded outputs 200 ps
t
LOCK PLL Lock Time Stable power supply, valid clock presented on REF pin 1 ms
NOTES:
1. REF Input has a threshold voltage of VDD/2.
2. All parameters specified with loaded outputs.

23S05T-1DCG

Mfr. #:
Manufacturer:
IDT
Description:
Clock Buffer 3.3V CLOCK BUFFER SPREAD SPECTRUM
Lifecycle:
New from this manufacturer.
Delivery:
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