85354AK-01 7 REV. A JANUARY 16, 2008
ICS85354-01
DUAL 2:1/1:2
DIFFERENTIAL-TO-LVPECL/ECL MULTIPLEXER
PRELIMINARY
TABLE 5. AC CHARACTERISTICS, V
CC
= 2.375V TO 3.465V, V
EE
= 0V OR V
CC
= 0V, V
EE
= -3.465V TO -2.375V
lobmySretemaraPsnoitidnoCmuminiMlacipyTmumixaMstinU
f
XAM
ycneuqerFtuptuO 5.2zHG
t
DP
1ETON;yaleDnoitagaporP 044sp
t
)pp(ks4,3ETON;wekStraP-ot-traP 58sp
t
tij
;SMR,rettiJesahPevitiddAreffuB
noitcesrettiJesahPevitiddAotrefer
)zHM02-zHk21(zHM80.22650.0sp
noitalosIXUM 55Bd
t
R
/t
F
emiTllaF/esiRtuptuO%08ot%02071sp
derusaemerasretemarapllA .detonesiwrehtosselnuzHG3.1
.tniopgnissorctuptuolaitnereffidehtottniopgnissorctupnilaitnereffidehtmorfderusaeM:1ETON
.snoitidnocdaollauqehtiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:2ETON
.stniopssorclaitnereffidtuptuoehttaderusaeM
segatlovylppusemasehttagnitareposecivedtnereffidnostuptuoneewtebwekssadenifeD:3ETON
derusaemerastuptuoeht,ecivedhcaenostupnifoepytemasehtgnisU.snoitidnocdaollauqehtiwdna
.stniopssorclaitnereffidehtta
.56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:4ETON
85354AK-01 8 REV. A JANUARY 16, 2008
ICS85354-01
DUAL 2:1/1:2
DIFFERENTIAL-TO-LVPECL/ECL MULTIPLEXER
PRELIMINARY
ADDITIVE PHASE JITTER
Additive Phase Jitter at
622.08MHz = 0.05ps (typical)
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
10 100 1k 10k 100k 1M 10M 100M
The spectral purity in a band at a specific offset from the
fundamental compared to the power of the fundamental is
called the
dBc Phase Noise.
This value is normally expressed
using a Phase noise plot and is most often the specified plot
in many applications. Phase noise is defined as the ratio of
the noise power present in a 1Hz band at a specified offset
from the fundamental frequency to the power value of the
fundamental. This ratio is expressed in decibels (dBm) or a
As with most timing specifications, phase noise measure-
ments have issues. The primary issue relates to the limita-
tions of the equipment. Often the noise floor of the equipment
is higher than the noise floor of the device. This is illustrated
ratio of the power in the 1Hz band to the power in the funda-
mental. When the required offset is specified, the phase noise
is called a
dBc
value, which simply means dBm at a specified
offset from the fundamental. By investigating jitter in the fre-
quency domain, we get a better understanding of its effects
on the desired application over the entire time record of the
signal. It is mathematically possible to calculate an expected
bit error rate given a phase noise plot.
above. The device meets the noise floor of what is shown, but
can actually be lower. The phase noise is dependant on the
input source and measurement equipment.
OFFSET FROM CARRIER FREQUENCY (HZ)
SSB PHASE NOISE dBc/HZ
85354AK-01 9 REV. A JANUARY 16, 2008
ICS85354-01
DUAL 2:1/1:2
DIFFERENTIAL-TO-LVPECL/ECL MULTIPLEXER
PRELIMINARY
OUTPUT LOAD AC TEST CIRCUIT DIFFERENTIAL INPUT LEVEL
PROPAGATION DELAY
PART-TO-PART SKEW
OUTPUT RISE/FALL TIME
V
CMR
Cross Points
V
PP
V
EE
nINA0, nINA1
nINB
V
CC
INA0, INA1
INB
SCOPE
Qx
nQx
LVPECL
2V
-0.375V to -1.465V
tsk(pp)
nQx
Qx
nQy
Qy
PART 1
PART 2
Clock
Outputs
20%
80%
80%
20%
t
R
t
F
V
SWING
t
PD
nINA0,
nINA1
nINB
QA0,
QA1,
QB
nQA0,
nQA1,
nQB
INA0,
INA1
INB
V
CC
V
EE
PARAMETER MEASUREMENT INFORMATION

85354AK-01LF

Mfr. #:
Manufacturer:
Description:
IC CLK MULTIPLX 2:1/1:2 16VFQFN
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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