MAX1162
16-Bit, +5V, 200ksps ADC with 10µA
Shutdown
16 ______________________________________________________________________________________
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital
samples, signal-to-noise ratio (SNR) is the ratio of the
full-scale analog input (RMS value) to the RMS quanti-
zation error (residual error). The ideal, theoretical mini-
mum analog-to-digital noise is caused by quantization
noise error only and results directly from the ADCs res-
olution (N bits):
SNR = (6.02 x N + 1.76)dB
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise, which includes all spectral
components minus the fundamental, the first five har-
monics, and the DC offset.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to the
RMS equivalent of all the other ADC output signals,
excluding the DC offset.
Effective Number of Bits
Effective number of bits (ENOB) indicate the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC error consists of quantiza-
tion noise only. With an input range equal to the full-
scale range of the ADC, calculate the effective number
of bits as follows:
ENOB = (SINAD - 1.76) / 6.02
Figure 13 shows the effective number of bits as a func-
tion of the MAX1162’s input frequency.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the first five harmonics of the input signal to the
fundamental itself. This is expressed as:
where V
1
is the fundamental amplitude and V
2
through
V
5
are the 2nd- through 5th-order harmonics.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of the
RMS amplitude of the fundamental (maximum signal
component) to the RMS value of the next largest fre-
quency component.
Supplies, Layout, Grounding,
and Bypassing
Use PC boards with separate analog and digital
ground planes. Do not use wire-wrap boards. Connect
the two ground planes together at the MAX1162 (pin 3).
Isolate the digital supply from the analog with a low-
value resistor (10) or ferrite bead when the analog
and digital supplies come from the same source
(Figure 14).
THD
VVVV
V
+++
20
2
2
3
2
4
2
5
2
1
log
SINAD dB
Signal
Noise Distortion
RMS
RMS
( ) log
+
()
20
INPUT FREQUENCY (kHz)
EFFECTIVE BITS
101
2
4
6
8
10
12
14
16
0
0.1 100
ENOB vs. INPUT FREQUENCY
Figure 13. Effective Number of Bits vs. Input Frequency
SCLK
DOUT
AGND
DGND
AIN
10
REF
AV
DD
DV
DD
DOUT
SCLK
CS
AIN
V
REF
+5V
4.7µF
0.1µF
0.1µF
GND
MAX1162
CS
Figure 14. Powering AV
DD
and DV
DD
from a Single Supply
MAX1162
16-Bit, +5V, 200ksps ADC with 10µA
Shutdown
______________________________________________________________________________________ 17
Constraints on sequencing the power supplies and
inputs are as follows:
Apply AGND before DGND.
Apply AIN and REF after AV
DD
and AGND
are present.
•DV
DD
is independent of the supply sequencing.
Ensure that digital return currents do not pass through
the analog ground and that return-current paths are low
impedance. A 5mA current flowing through a PC board
ground trace impedance of only 0.05Ω creates an error
voltage of about 250µV, 4LSB error with a +4V full-
scale system.
The board layout should ensure that digital and analog
signal lines are kept separate. Do not run analog and
digital (especially the SCLK and DOUT) lines parallel to
one another. If one must cross another, do so at right
angles.
The ADCs high-speed comparator is sensitive to high-
frequency noise on the AV
DD
power supply. Bypass an
excessively noisy supply to the analog ground plane
with a 0.1µF capacitor in parallel with a 1µF to 10µF
low-ESR capacitor. Keep capacitor leads short for best
supply-noise rejection.
AIN
TRACK AND
HOLD
16-BIT SAR
ADC
CONTROL
DV
DD
DGND
CS
AGND
AV
DD
REF
DOUT
SCLK
MAX1162
OUTPUT
BUFFER
Functional Diagram
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in
the package code indicates RoHS status only. Package draw-
ings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
10 µMAX U10-2
21-0061
MAX1162
16-Bit, +5V, 200ksps ADC with 10µA
Shutdown
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE
DESCRIPTION
PAGES
CHANGED
0 7/02 Initial release
1 4/10 Changed analog supply current and added lead-free information 1, 3, 5

MAX1162AEUB+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
IC ADC 16BIT 200KSPS 10-MSOP
Lifecycle:
New from this manufacturer.
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