MAX803 Series, NCP803 Series
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6
Detail Operation Description
The MAX803, NCP803 series microprocessor reset
supervisory circuits are designed to monitor the power
supplies in digital systems and provide a reset signal to the
processor without any external components. Figure 2 shows
the timing diagram and a typical application below. Initially
consider that input voltage V
CC
is at a nominal level greater
than the voltage detector upper threshold (
V
TH
). And the
RESE
(RESET) output voltage (Pin 2) will be in the high
state for MAX803 and NCP803 devices. If there is an input
power interruption and V
CC
becomes significantly
deficient, it will fall below the lower detector threshold
(V
TH−
). This event causes the RESET output to be in the low
state for the MAX803 and NCP803 devices. After
completion of the power interruption, V
CC
will rise to its
nominal level and become greater than the V
TH
. This
sequence activates the internal oscillator circuitry and
digital counter to count. After the count of the timeout
period, the reset output will revert back to the original state.
t
RP
V
CC
V
TH+
V
TH–
V
CC
V
TH–
0V
V
CC
V
TH–
0V
Input Voltage
Reset Output
MAX803, NCP803
Reset Output
MAX810
Figure 12. Timing Waveforms