Data Sheet ADuM5200/ADuM5201/ADuM5202
Rev. B | Page 19 of 28
APPLICATIONS INFORMATION
The dc-to-dc converter section of the ADuM5200/ADuM5201/
ADuM5202 works on principles that are common to most
switching power supplies. It has a secondary side controller
architecture with isolated pulse-width modulation (PWM)
feedback. V
DD1
power is supplied to an oscillating circuit that
switches current into a chip scale air core transformer. Power
transferred to the secondary side is rectified and regulated to
either 3.3 V or 5 V. The secondary (V
ISO
) side controller regulates
the output by creating a PWM control signal that is sent to the
primary (V
DD1
) side by a dedicated iCoupler data channel. The
PWM modulates the oscillator circuit to control the power being
sent to the secondary side. Feedback allows for significantly
higher power and efficiency.
The ADuM5200/ADuM5201/ADuM5202 implements under-
voltage lockout (UVLO) with hysteresis on the V
DD1
power input.
This feature ensures that the converter does not enter oscillation
due to noisy input power or slow power-on ramp rates.
The ADuM5200/ADuM5201/ADuM5202 can accept an external
regulation control signal (RC
IN
) that can be connected to other
isoPower devices. This allows a single regulator to control multiple
power modules without contention. When accepting control from
a master power module, the V
ISO
pins can be connected together,
adding their power. Because there is only one feedback control
path, the supplies work together seamlessly. The ADuM5200/
ADuM5201/ADuM5202 can only regulate themselves or accept
regulation (as slave devices) from another device in this product
line; they cannot provide a regulation signal to other devices.
PCB LAYOUT
The ADuM5200/ADuM5201/ADuM5202 digital isolators
with 0.5 W isoPower, integrated dc-to-dc converter require no
external interface circuitry for the logic interfaces. Power supply
bypassing is required at the input and output supply pins (see
Figure 23). Note that low ESR bypass capacitors are required
between Pin 1 and Pin 2 and between Pin 15 and Pin 16, as
close to the chip pads as possible.
The power supply section of the ADuM5200/ADuM5201/
ADuM5202 uses a 180 MHz oscillator frequency to pass power
efficiently through its chip scale transformers. In addition, the
normal operation of the data section of the iCoupler introduces
switching transients on the power supply pins. Bypass capacitors
are required for several operating frequencies. Noise suppression
requires a low inductance, high frequency capacitor, whereas ripple
suppression and proper regulation require a large value capacitor.
These capacitors are most conveniently connected between
Pin 1 and Pin 2 for V
DD1
and between Pin 15 and Pin 16 for V
ISO
.
To suppress noise and reduce ripple, a parallel combination of
at least two capacitors is required. The recommended capacitor
values are 0.1 μF and 10 μF for V
DD1
. The smaller capacitor must
have a low ESR; for example, use of a ceramic capacitor is advised.
Note that the total lead length between the ends of the low ESR
capacitor and the input power supply pin must not exceed 2 mm.
Installing the bypass capacitor with traces more than 2 mm in
length may result in data corruption. Consider bypassing between
Pin 1 and Pin 8 and between Pin 9 and Pin 16 unless both common
ground pins are connected together close to the package.
V
DD1
BYPASS < 2mm
GND
1
V
IA
/V
OA
V
IB
/V
OB
V
ISO
GND
ISO
V
OA
/V
IA
V
OB
/V
IB
NC
V
SEL
RC
IN
RC
SEL
V
E1
/NC V
E2
/NC
GND
1
GND
ISO
07540-020
Figure 23. Recommended PCB Layout
In applications involving high common-mode transients, ensure
that board coupling across the isolation barrier is minimized.
Furthermore, design the board layout such that any coupling
that does occur affects all pins equally on a given component
side. Failure to ensure this can cause voltage differentials between
pins exceeding the absolute maximum ratings for the device
(specified in Table 19), thereby leading to latch-up and/or
permanent damage.
The ADuM5200/ADuM5201/ADuM5202 is a power device that
dissipates approximately 1 W of power when fully loaded and
running at maximum speed. Because it is not possible to apply a
heat sink to an isolation device, the device primarily depends
on heat dissipation into the PCB through the GND pins. If the
device is used at high ambient temperatures, provide a thermal
path from the GND pins to the PCB ground plane. The board
layout in Figure 23 shows enlarged pads for Pin 2, Pin 8, Pin 9,
and Pin 15. Multiple vias should be implemented from the pad
to the ground plane to significantly reduce the temperature
inside the chip. The dimensions of the expanded pads are at the
discretion of the designer and depend on the available board space.
START-UP BEHAVIOR
The ADuM5200/ADuM5201/ADuM5202 do not contain a soft
start circuit. Take the start-up current and voltage behavior into
account when designing with this device.
When power is applied to V
DD1
, the input switching circuit begins
to operate and draw current when the UVLO minimum voltage
is reached. The switching circuit drives the maximum available
power to the output until it reaches the regulation voltage where
PWM control begins. The amount of current and time this
takes depends on the load and the V
DD1
slew rate.
With a fast V
DD1
slew rate (200 μs or less), the peak current
draws up to 100 mA/V of V
DD1
. The input voltage goes high
faster than the output can turn on; therefore, the peak current
is proportional to the maximum input voltage.