LTC3707
13
3707fb
Figure 1 on the fi rst page is a basic LTC3707 application
circuit. External component selection is driven by the
load requirement, and begins with the selection of R
SENSE
and the inductor value. Next, the power MOSFETs and
D1 are selected. Finally, C
IN
and C
OUT
are selected. The
circuit shown in Figure 1 can be confi gured for operation
up to an input voltage of 28V (limited by the external
MOSFETs).
R
SENSE
Selection For Output Current
R
SENSE
is chosen based on the required output current. The
LTC3707 current comparator has a maximum threshold
of 75mV/R
SENSE
and an input common mode range of
SGND to 1.1(INTV
CC
). The current comparator threshold
sets the peak of the inductor current, yielding a maximum
average output current I
MAX
equal to the peak value less
half the peak-to-peak ripple current, ΔI
L
.
Allowing a margin for variations in the LTC3707 and external
component values yields:
OPERATION
(Refer to Functional Diagram)
It can readily be seen that the advantages of 2-phase opera-
tion are not just limited to a narrow operating range, but
in fact extend over a wide region. A good rule of thumb
for most applications is that 2-phase operation will reduce
the input capacitor requirement to that for just one channel
operating at maximum current and 50% duty cycle.
A fi nal question: If 2-phase operation offers such an
advantage over single-phase operation for dual switching
regulators, why hasn’t it been done before? The answer
is that, while simple in concept, it is hard to implement.
Constant-frequency current mode switching regulators
require an oscillator derived “slope compensation”
signal to allow stable operation of each regulator at over
50% duty cycle. This signal is relatively easy to derive in
single-phase dual switching regulators, but required the
development of a new and proprietary technique to allow
2-phase operation. In addition, isolation between the two
channels becomes more critical with 2-phase operation
because switch transitions in one channel could potentially
disrupt the operation of the other channel.
The LTC1628 and the LTC3707 are proof that these hurdles
have been surmounted. The new device offers unique ad-
vantages for the ever-expanding number of high effi ciency
power supplies required in portable electronics.
INPUT VOLTAGE (V)
0
INPUT RMS CURRENT (A)
3.0
2.5
2.0
1.5
1.0
0.5
0
10 20 30 40
3707 F04
SINGLE PHASE
DUAL CONTROLLER
2-PHASE
DUAL CONTROLLER
V
O1
= 5V/3A
V
O2
= 3.3V/3A
Figure 4. RMS Input Current Comparison
APPLICATIONS INFORMATION
R
SENSE
=
50mV
I
MAX
Because of possible PCB noise in the current sensing loop,
the AC current sensing ripple of ΔV
SENSE
= ΔI • R
SENSE
also needs to be checked in the design to get good
signal-to-noise ratio. In general, for a reasonable good
PCB layout, a 15mV ΔV
SENSE
voltage is recommended
as a conservative number to start with.
When using the controller in very low dropout conditions,
the maximum output current level will be reduced due to
the internal compensation required to meet stability cri-
terion for buck regulators operating at greater than 50%
duty factor. A curve is provided to estimate this reducton
in peak output current level depending upon the operating
duty factor.
LTC3707
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APPLICATIONS INFORMATION
Selection of Operating Frequency
The LTC3707 uses a constant frequency architecture with
the frequency determined by an internal oscillator capacitor.
This internal capacitor is charged by a fi xed current plus
an additional current that is proportional to the voltage
applied to the FREQSET pin.
A graph for the voltage applied to the FREQSET pin vs
frequency is given in Figure 5. As the operating frequency
is increased the gate charge losses will be higher, reducing
effi ciency (see Effi ciency Considerations). The maximum
switching frequency is approximately 310kHz.
Inductor Value Calculation
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is effi ciency. A higher
frequency generally results in lower effi ciency because
of MOSFET gate charge losses. In addition to this basic
trade-off, the effect of inductor value on ripple current and
low current operation must also be considered.
The inductor value has a direct effect on ripple current.
The inductor ripple current ΔI
L
decreases with higher
inductance or frequency and increases with higher V
IN
:
ΔI
L
=
1
(f)(L)
V
OUT
1–
V
OUT
V
IN
OPERATING FREQUENCY (kHz)
120 170 220 270 320
FREQSET PIN VOLTAGE (V)
3707 F05
2.5
2.0
1.5
1.0
0.5
0
Figure 5. FREQSET Pin Voltage vs Frequency
Accepting larger values of ΔI
L
allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ΔI = 30% • I
OUT(MAX)
or higher for
good load transient response and suffi cient ripple current
signal in the current loop. Remember, the maximum ΔI
L
occurs at the maximum input voltage.
The inductor value also has secondary effects. The tran-
sition to Burst Mode operation begins when the average
inductor current required results in a peak current below
25% of the current limit determined by R
SENSE
. Lower
inductor values (higher ΔI
L
) will cause this to occur at
lower load currents, which can cause a dip in effi ciency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High effi ciency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite, molypermalloy,
or Kool Mµ
®
cores. Actual core loss is independent of core
size for a fi xed inductor value, but it is very dependent
on inductance selected. As inductance increases, core
losses go down. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
loss core material for toroids, but it is more expensive
than ferrite. A reasonable compromise from the same
manufacturer is Kool Mµ. Toroids are very space effi cient,
especially when you can use several layers of wire. Because
they generally lack a bobbin, mounting is more diffi cult.
LTC3707
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APPLICATIONS INFORMATION
However, designs for surface mount are available that do
not increase the height signifi cantly.
Power MOSFET and D1 Selection
Two external power MOSFETs must be selected for each
controller with the LTC3707: One N-channel MOSFET for
the top (main) switch, and one N-channel MOSFET for the
bottom (synchronous) switch.
The peak-to-peak drive levels are set by the INTV
CC
voltage. This voltage is typically 5V during start-up
(see EXTV
CC
Pin Connection). Consequently, logic-level
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected
(V
IN
< 5V); then, sub-logic level threshold MOSFETs
(V
GS(TH)
< 3V) should be used. Pay close attention to the
BV
DSS
specifi cation for the MOSFETs as well; most of the
logic level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R
DS(ON)
, reverse transfer capacitance C
RSS
, input
voltage and maximum output current. When the LTC3707
is operating in continuous mode the duty cycles for the
top and bottom MOSFETs are given by:
Main Switch Duty Cycle =
V
OUT
V
IN
Synchronous Switch Duty Cycle =
V
IN
–V
OUT
V
IN
The MOSFET power dissipations at maximum output
current are given by:
P
MAIN
=
V
OUT
V
IN
I
MAX
()
2
1
()
R
DS(ON)
+
kV
IN
()
2
I
MAX
()
C
RSS
()
f
()
P
SYNC
=
V
IN
–V
OUT
V
IN
I
MAX
()
2
1
()
R
DS(ON)
where δ is the temperature dependency of R
DS(ON)
and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I
2
R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
IN
< 20V
the high current effi ciency generally improves with larger
MOSFETs, while for V
IN
> 20V the transition losses rapidly
increase to the point that the use of a higher R
DS(ON)
device
with lower C
RSS
actually provides higher effi ciency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1+δ) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs Temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs. C
RSS
is usually specifi ed in the MOSFET
characteristics. The constant k = 1.7 can be used to esti-
mate the contributions of the two terms in the main switch
dissipation equation.
The Schottky diode D1 shown in Figure 1 conducts dur-
ing the dead-time between the conduction of the two
power MOSFETs. This prevents the body diode of the
bottom MOSFET from turning on, storing charge during
the dead-time and requiring a reverse recovery period
that could cost as much as 3% in effi ciency at high V
IN
.
A 1A to 3A Schottky is generally a good compromise for
both regions of operation due to the relatively small aver-
age current. Larger diodes result in additional transition
losses due to their larger junction capacitance. Schottky
diodes should be placed in parallel with the synchronous
MOSFETs when operating in pulse-skip mode or in Burst
Mode operation.
C
IN
and C
OUT
Selection
The selection of C
IN
is simplifi ed by the multiphase ar-
chitecture and its impact on the worst-case RMS current
drawn through the input network (battery/fuse/capacitor).
It can be shown that the worst case RMS current occurs
when only one controller is operating. The controller with
the highest (V
OUT
)(I
OUT
) product needs to be used in the
formula below to determine the maximum RMS current
requirement. Increasing the output current, drawn from
the other out-of-phase controller, will actually decrease the
input RMS ripple current from this maximum value (see
Figure 4). The out-of-phase technique typically reduces
the input capacitors RMS ripple current by a factor of

LTC3707EGN#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Hi Eff Two-Phase Dual Synch
Lifecycle:
New from this manufacturer.
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