CS5466
10 DS659F2
4. THEORY OF OPERATION
The CS5466 is a dual-channel analog-to-digital convert-
er (ADC) followed by a computation engine that per-
forms an energy-to-pulse conversion. The flow diagram
for the two data paths is depicted in Figure 2. The ana-
log inputs are structured with two dedicated channels,
voltage and current, then optimized to simplify interfac-
ing to sensing elements.
The voltage-sensing element introduces a voltage
waveform on the voltage channel input VIN and is sub-
ject to a fixed 10x gain amplifier. A second-order delta-
sigma modulator samples the amplified signal for digiti-
zation.
Simultaneously, the current sensing element introduces
a voltage waveform on the current channel input IIN
and is subject to four programmable gains. The ampli-
fied signal is sampled by a fourth-order delta-sigma
modulator for digitization. Both converters sample at a
rate of MCLK / 8. The over-sampling provides a wide
dynamic range and simplified anti-alias filter design.
4.1 Digital Filters
The decimating digital filters on both channels are Sinc
3
filters followed by fourth-order IIR filters. The single-bit
data is passed to the low-pass decimation filter and out-
put at a fixed word rate. The output word is passed to
the IIR filter to compensate for the magnitude roll-off of
the low-pass filtering operation.
An optional digital high-pass filter (HPF in Figure 2) re-
moves any DC component from the selected signal
path. By removing the DC component from the voltage
or current channel, any DC content will also be removed
from the calculated average active (real) power as well.
4.2 Active Power Computation
The instantaneous voltage and current data samples
are multiplied to obtain the instantaneous power. The
product is then averaged over 400 conversions to com-
pute the active power value used to drive pulse outputs
E1
, E2, and FOUT. Output pulse rate of E1 and E2 can
be set to one of four frequencies to directly drive a step-
per motor or a electromechanical counter or interface to
a microcontroller or infrared LED. The alternating output
pulses of E1
and E2 allows for use with low-cost elec-
tromechanical counters.
Output FOUT provides a uniform pulse stream that is
proportional to the active power and is designed for sys-
tem calibration. The FREQ[2:0] inputs set the output
pulse rate of E1
, E2, and FOUT. See ”Energy Pulse
Outputs” on page 11. for more details.
2nd Order

Modulator
4th Order

Modulator
x
VIN±
IIN±
Energy-to-
Pulse Rate
Converter
E1
E2
FOUT
Sinc
3
PGA
10x
HPF
NEG
IGAIN[1:0]
FREQ[2:0]
IIR
IIR
Sinc
3
Current Channel
Voltage Channel
Digital Filter
HPF
N=400
N
HPF
Config
Digital Filter
Figure 2. Data Flow
CS5466
DS659F2 11
5. FUNCTIONAL DESCRIPTION
5.1 Analog Inputs
The CS5466 is equipped with two fully differential input
channels. The inputs VIN and IIN are designated as
the voltage and current channel inputs, respectively.
The full-scale differential input voltage for the current
and voltage channel is 250 mV
P
.
5.1.1 Voltage Channel
The output of the line-voltage resistive divider or trans-
former is connected to the VIN+ and VIN- input pins of
the CS5466. The voltage channel is equipped with a
10x, fixed-gain amplifier. The full-scale signal level that
can be applied to the voltage channel is 250 mV. If the
input signal is a sine wave, the maximum RMS voltage
is:
which is approximately 70.7% of maximum peak volt-
age.
5.1.2 Current Channel
The output of the current-sense resistor or transformer
is connected to the IIN+ and IIN- input pins of the
CS5466. To accommodate different current-sensing de-
vices, the current channel incorporates programmable
gains which can be set to one of four input ranges. Input
pins IGAIN1 and IGAIN0 (See Table 1) define the four
gain selections and corresponding maximum input sig-
nal level.
For example, if IGAIN1=IGAIN0=0, the current chan-
nel’s gain is set to 10x. If the input signals are pure sinu-
soids with zero phase shift, the maximum peak
differential signal on the current or voltage channel is
250 mV
P
. The input signal levels are approximately
70.7% of maximum peak voltage producing a full-scale
energy pulse registration equal to 50% of absolute max-
imum energy pulse registration. This will be discussed
further in Section 5.3 Energy Pulse Outputs on page 11.
5.2 High-pass Filter
By removing the offset from either channel, no error
component will be generated at DC when computing the
active power. Input pin HPF
defines the three options:
High-pass Filter (HPF) is disabled when pin HPF is
connected high.
HPF is enabled in the voltage channel when pin HPF
is
connected low.
HPF is enabled in the current channel when pin HPF is
connected to pin FOUT.
5.3 Energy Pulse Outputs
The CS5466 provides three output pins for energy reg-
istration. The E1
and E2 pins provide a simple interface
from which energy can be registered. These pins are
designed to directly connect to a stepper motor or elec-
tromechanical counter. The pulse rate on the E1
and E2
pins are in the range of 0 to 4 Hz and all frequency set-
tings are optimized to be used with standard meter con-
stants. The FOUT pin is designated for system
calibration and the pulse rate can be selected to reach
a frequency of 8000 Hz.
5.3.1 Pulse Output Format.
The CS5466 produces alternating pulses on E1 and E2.
This pulse format is designed to drive a stepper motor.
Each pin produces active-low pulses with a minimum
pulse width of 250 ms when MCLK = 4.096 MHz. Refer
to “Switching Characteristics” on page 8 for timing pa-
rameters.
The FOUT pin issues active-high pulses. The pulse
width is equal to 90 ms (typical), unless the period falls
below 180 ms. At this time the pulses will be equal to
half the period. In mode 3 (FREQ[2:0] = 3), the pulse
width of all FOUT pulses is typically 20 s regardless of
the pulse rate (MCLK = 4.096 MHz).
5.3.2 Selecting Frequency of E1 and E2
The pulse rate on E1 and E2 can be set to one of four
frequency ranges. Input pins FREQ1 and FREQ0 (See
Table 2) determine the maximum frequency on E1
and
E2
for pure sinusoidal inputs with zero phase shift. As
shown in Figure 1 on page 8, the frequency of E2
is
equal to the frequency of E1
with active-low alternating
pulses.
As discussed in Section 5.1.2 Current Channel on page
11, the maximum frequency on the E1
and E2 output
pins is equal to the selected frequency in Table 2 if the
maximum peak differential signal applied to both chan-
nels is a sine wave with zero phase shift.
IGAIN1 IGAIN0 Maximum Input
Range
0 0 ±250mV 10x
01±50mV50x
1 0 ±25mV 100x
1 1 ±16.67mV 150x
Table 1. Current Channel PGA Setting
CS5466
12 DS659F2
5.3.3 Selecting Frequency of FOUT
The pulse output FOUT is designed to assist with meter
calibration. Using the FREQ[2:0] pins, FOUT can be set
to frequencies higher than that of E1
and E2. The FOUT
frequency is directly proportional to the E1
and E2 fre-
quencies. Table 2 defines the maximum frequencies for
FOUT and the dependency of FOUT on E1
and E2.
5.3.4 Absolute Max Frequency on E1
and E2
The CS5466 supports input signals on the voltage and
current channels that may not be a sine wave. A typical
situation of achieving the absolute maximum frequency
on E1
and E2 would be if a 250 mV dc signal is applied
to the VIN and IIN input pins. The digital high-pass filter
should be disengaged by selecting HPF
= 1.
The absolute maximum pulse rate observed on E1
and
E2
, determined by the FREQ[2:0] selection is defined
below in Table 3.
Frequency Select Maximum Frequency for a Sine Wave (Notes 1, 2 and 3)
FREQ2 FREQ1 FREQ0 E1
or E2 E1+E2 FOUT
0 0 0 0.125 Hz 0.25 Hz 64x(E1
+E2)16 Hz
0 0 1 0.25 Hz 0.5 Hz 32x(E1
+E2)16 Hz
0 1 0 0.5Hz 1.0 Hz 16x(E1
+E2)16 Hz
0 1 1 1.0 Hz 2.0 Hz 2048x(E1
+E2) 4,096 Hz
1 0 0 0.125 Hz 0.25 Hz 128x(E1
+E2)32 Hz
1 0 1 0.25 Hz 0.5 Hz 64x(E1
+E2)32 Hz
1 1 0 0.5 Hz 1.0 Hz 32x(E1
+E2)32 Hz
1 1 1 1.0 Hz 2.0 Hz 16x(E1
+E2)32 Hz
Notes: 1 A pure sinusoidal input with zero phase shift is applied to the voltage and current channel.
2 MCLK = 4.096 MHz
3 See Figure 1 on page 8 for E1 and E2 timing diagram.
Table 2. Maximum Frequency for E1, E2, and FOUT
Frequency Select Absolute Max Frequency
FREQ2 FREQ1 FREQ0 E1
or E2 E1+E2
x 0 0 0.25 Hz 0.5 Hz
x 0 1 0.5 Hz 1.0 Hz
x 1 0 1.0 Hz 2.0 Hz
x 1 1 2.0 Hz 4.0 Hz
Table 3. Absolute Max Frequency on E1
and E2

CS5466-ISZR

Mfr. #:
Manufacturer:
Cirrus Logic
Description:
Current & Power Monitors & Regulators IC for Residential PWR-Meter Apps
Lifecycle:
New from this manufacturer.
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