LT1249CS8#PBF

LT1249
7
APPLICATIONS INFORMATION
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U
Line Current Limiting
Maximum voltage across R
MOUT
is internally limited to
1.1V. Therefore, line current limit is 1.1V divided by the
sense resistor R
S
. With a 0.2 sense resistor R
S
line
current limit is 5.5A. As a general rule, R
S
is chosen
according
R
IRV
KP
S
M MAX MOUT LINE MIN
OUT MAX
=
()()( )
(. )
() ()
()
1 414
where P
OUT(MAX)
is the maximum power output and K is
usually between 1.1 and 1.3 depending on efficiency and
resistor tolerance. When the output is overloaded and line
current reaches limit, output voltage V
OUT
will drop to keep
line current constant. System stability is still maintained
by the current loop which is controlled by the current
amplifier. Further load current increase results in further
V
OUT
drop and clipping of the line current, which degrades
power factor.
Synchronization
The LT1249 can be externally synchronized in a frequency
range of 127kHz to 160kHz. Figure 2 shows the synchro-
nizing circuit. Synchronizing occurs when CA
OUT
pin is
pulled below 0.5V with an external transistor and a Schottky
diode. The Schottky diode and the 10k pull-up resistor are
necessary for the required fast slewing back up to the
normal operating voltage on CA
OUT
after the transistor is
turned off. Positive slewing on CA
OUT
should be faster
than the oscillator ramp rate of 0.5V/µs.
The width of the synchronizing pulse should be under
60ns. The synchronizing pulses introduce an offset volt-
age on the current amplifier inputs, according to:
V
ts fs I
V
R
g
OS
C
C
m
=
+
()()
.05
2
ts = pulse width
fs = pulse frequency
I
C
= CA
OUT
source current ( 150µA)
V
C
= CA
OUT
operating voltage (1.8V to 6.8V)
R2 = resistor for the midfrequency “zero” in the current loop
g
m
= current amplifier transconductance ( 320µmho)
With ts = 30ns, fs = 130kHz, V
C
= 3V and R2 = 10k, offset
voltage shift is 5mV. Note that this offset voltage will add
slight distortion to line current at light load.
Figure 2. Synchronizing the LT1249
R1
10k
R2
10k
2k
5V
0V
V
CC
80pF
1N5712
CA
OUT
1nF
2N2369
1249 F02
Overvoltage Protection
In Figure 3, R1 and R2 set the regulator output DC level:
V
OUT
= V
REF
[(R1 + R2)/R2]. With R1 = 1M and R2 = 20k,
V
OUT
is 382V.
Because of the slow loop response necessary for power
factor correction, output overshoot can occur with sudden
load removal or reduction. To protect the power compo-
nents and output load, the LT1249 voltage error amplifier
senses the output voltage and quickly shuts off the current
switch when overvoltage occurs. When overshoot occurs
on V
OUT
, the overcurrent from R1 will go through VA
OUT
because amplifier feedback keeps V
SENSE
locked at 7.5V.
When this overcurrent reaches 44µA amplifier sinking
limit, the amplifier loses feedback and its output snaps low
to turn the multiplier off.
Overvoltage trip level: V
OUT
= (44µA)(R1)
+
V
OUT
VA
OUT
C1
0.47µF
R3
330k
0.047µF
LT1249
MULTIPLIER
44µA
22µA
V
SENSE
R1
1M
R2
20k
V
REF
7.5V
EA
1249 F03
Figure 3. Overvoltage Protection
8
LT1249
The Figure 3 circuit therefore has 382V on V
OUT
, and an
overvoltage level = (V
OUT
+ 44V), or 426V. With a 22µA
hysteresis, V
OUT
then has to drop 22V to 404V before
feedback recovers and the switch turns back on.
M
OUT
is a high impedance current output. In the current
loop, offset line current is determined by multiplier offset
current and input offset voltage of the current amplifier.
A negative 4mV current amplifier V
OS
translates into
20mA line current and 5W input power for 250V line if
0.2 sense resistor is used. Under no load or when the
load power is less than this offset input power, V
OUT
would
slowly charge up to an overvoltage state because the
overvoltage comparator can only reduce multiplier output
current to zero. This does not guarantee zero output
current if the current amplifier has offset. To regulate V
OUT
under this condition, the amplifier M1 (see Block Dia-
gram), becomes active in the current loop when VA
OUT
goes down to 1V. The M1 can put out up to 15µA to the 4k
resistor at the inverting input to cancel the current ampli-
fier negative V
OS
and keep V
OUT
error to within 2V.
Undervoltage Lockout
The LT1249 turns on when V
CC
is higher than 16V and
remains on until V
CC
falls below 10V, whereupon the chip
enters the lockout state. In the lockout state, the LT1249
only draws 250µA, the oscillator is off, the V
REF
and the
GTDR pins remain low to keep the power MOSFET off.
Start-Up and Supply Voltage
The LT1249 draws only 250µA before the chip starts at
16V on V
CC
. To trickle start, a 90k resistor from the power
line to V
CC
supplies the trickle current and C4 holds the V
CC
up while switching starts (see Figure 4). Then the auxiliary
winding takes over and supplies the operating current.
Note that D3 and the large value C3, in both Figures 4 and
5, are only necessary for systems that have sudden large
load variation down to minimum load and/or very light
load conditions. Under these conditions, the loop may
exhibit a start/restart mode because switching remains off
long enough for C4 to discharge below 10V. The C3 will
hold V
CC
up until switching resumes. For less severe load
variations, D3 is replaced with a short and C3 is omitted.
The turns ratio between the primary winding and the
APPLICATIONS INFORMATION
WUU
U
V
CC
R1
90k
1W
18V
1249 F05
+
C3
390µF
35V
C4
56µF
35V
+
LINE
MAIN INDUCTOR
C2
1000pF
450V
D3
D1
D2
Figure 5. Power Supply for LT1249
auxiliary winding determines V
CC
according to: V
OUT
/(V
CC
– 2V) = N
P
/N
S
. For 382V V
OUT
and 18V V
CC
, N
P
/N
S
19.
In Figure 5 a new technique for supply voltage eliminates
the need for an extra inductor winding. It uses capacitor
charge transfer to generate a constant current source
which feeds a Zener diode. Current to the Zener is equal to
(V
OUT
– V
Z
)(C)(f), where V
Z
is Zener voltage and f is
switching frequency. For V
OUT
= 382V, V
Z
= 18V, C =
1000pF and f = 100kHz, Zener current will be 36mA. This
is enough to operate the LT1249, including the FET gate
drive.
Output Capacitor
The peak-to-peak 120Hz output ripple is determined by:
V
P-P
= (2)(I
LOAD
DC)(Z)
where I
LOAD
DC: DC load current
Z: capacitor impedance at 120Hz
For 180µF at 300W load, I
LOAD
DC = 300W/385V = 0.78A,
V
CC
N
P
N
S
R1
90k
1W
C1
2µF
1249 F04
+
+
C2
2µF
C3
390µF
+
C4
56µF
+
LINE
ALL CAPACITORS ARE RATED 35V
MAIN INDUCTOR
D2
D3D1
Figure 4. Power Supply for LT1249
LT1249
9
V
P-P
= (2)(0.78A)(7.4) = 11.5V. If less ripple is desired,
higher capacitance should be used.
The selection of the output capacitor should also be based
on the operating ripple current through the capacitor.
The ripple current can be divided into three major compo-
nents. The first is at 120Hz whose RMS value is related to
the DC load current as follows:
I
1RMS
(0.71)(I
LOAD
DC)
The second component contains the PF switching fre-
quency ripple current and its harmonics. Analysis of this
ripple is complicated because it is modulated with a 120Hz
signal. However, computer numerical integration and Fou-
rier analysis approximate the RMS value reasonably close
to the bench measurements. The RMS value is about
0.82A at a typical condition of 120VAC, 200W load. This
ripple is line voltage dependent, and the worst case is at
low line.
I
2RMS
= 0.82A at 120VAC, 200W
The third component is the switching ripple from the load,
if the load is a switching regulator.
I
3RMS
I
LOAD
DC
For United Chemicon KMH 400V capacitor series, ripple
current multiplier for currents at 100kHz is 1.43. The
equivalent 120Hz ripple current can then be found:
II
II
RMS RMS
RMS RMS
=
()
+
+
1
2
2
2
3
2
143 143..
For a typical system that runs at an average load of 200W
and 385V output:
I
LOAD
DC = 0.52A
I
1RMS
(0.71)(0.52A) = 0.37A
I
2RMS
0.82A at 120VAC
I
3RMS
I
LOAD
DC = 0.52A
IA
AA
A
RMS
=
()
+
+
=037
082
143
052
143
077
2
22
.
.
.
.
.
.
APPLICATIONS INFORMATION
WUU
U
The 120Hz ripple current rating at 105°C ambient is 0.95A
for the 180µF KMH 400V capacitor. The expected life of the
output capacitor may be calculated from the thermal
stress analysis:
LL
O
CT
K
T
AMB
T
O
=
°+ +
()()
()()
2
105
10
∆∆
where
L = expected life time
L
O
= hours of load life at rated ripple current and rated
ambient temperature
T
K
= capacitor internal temperature rise at rated condi-
tion. T
K
= (I
2
R)/(KA), where I is the rated current, R is
capacitor ESR, and KA is a volume constant.
T
AMB
= operating ambient temperature
T
O
= capacitor internal temperature rise at operating
condition
In our example, L
O
= 2000 hours and T
K
= 10°C at rated
0.95A. T
O
can then be calculated from:
∆∆T
I
A
T
A
A
CC
O
RMS
K
=
=
°= °
095
077
095
10 6 6
22
.
()
.
.
().
Assuming the operating ambient temperature is 60°C, the
approximate life time is:
L
O
CC C C
°+ ° °+ °
()()
()(.)
2000 2
105 10 60 6 6
10
57,000 Hrs.
For longer life, capacitor with higher ripple current rating
or parallel capacitors should be used.
Protection Against Abnormal Current Surge
Conditions
The LT1249 has an upper limit on the allowed voltage
across the current sense resistor. The voltage into the
M
OUT
pin connected to this resistor must not exceed –6V
while the chip is running
and –12V under any conditions.
The LT1249 gate drive will malfunction if the M
OUT
pin
voltage exceeds –6V while V
CC
is powered, destroying the
power FET. The 12V absolute limit is imposed by ESD
clamps on the M
OUT
pin. Large currents will flow at

LT1249CS8#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Power Factor Correction - PFC 8 Pin Pwr Factor Correction Cont
Lifecycle:
New from this manufacturer.
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