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PCS3P2042BG-08TR

P1-P3P4-P6P7-P7
PCS3P2042B
LCD Panel EMI Reduction IC
©2010 SCILLC. All rights reserved. Pub
lication Order Number:
NOVEMBER 2010 – Rev. 2.1 PCS3P2042/D
Features
• FCC approved method of EMI attenuation.
• P
rovides up to 15dB of EMI suppression.
• Generates a low EMI spread spectrum clock of the
input frequency.
• Input frequency range: 30MHz - 110MHz.
• Output frequency range: 30MHz - 110MHz
• Optimized for 32.5MHz, 54MHz, 65MHz, 74MHz and
108MHz pixel clock frequencies.
• Internal loop filter minimizes external components and
board space.
• Eight selectable high spread ranges up to ±2%.
• Selectable spread options: Down Spread and Center
Spread
• SSON# control pin for spread spectrum enable and
disable options.
• Low cycle-to-cycle jitter.
• 3.3V ± 0.3V operating range.
• CMOS design.
• Supports most mobile graphic accelerator and LCD
timing controller specifications.
• Available in 8-pin TSSOP Package.
Pro
duct Description
The PCS3P2042B is a versatile spread spectrum
fre
quency modulator designed specifically for digital flat
panel applications. The PCS3P2042B reduces
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of down stream
clock and data dependent signals. The PCS3P2042B
allows significant system cost savings by reducing the
number of circuit board layers ferrite beads, shielding and
other passive components that are traditionally required to
pass EMI regulations.
The PCS3P2042B uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
The PCS3P2042B modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation.’
Applications
The PCS3P2042B is targeted towards digital flat panel
app
lications for notebook PCs, palm-size PCs, office
automation equipments and LCD monitors.
Block Diagram
VSS
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
VCO
Output
Divider
PLL
VDD
SSON#
SR0 CP1 CP0
ModOUT
CLKIN
PCS3P2042B
Rev. 2 | Page 2 of 7 | www.onsemi.com
SR0
CP0
CLKIN
SSON#
ModOUT
1
2
3
4
5
6
7
8
PCS3P2042B
CP1
VSS
VDD
Pin Configuration
Pin Description
Pin# Pin Name Type Description
1 CLKIN I External reference frequency input. Connect to externally generated reference signal.
2 CP0 I
Digital logic input used to select Spreading Range. This pin has an internal pull-up
resistor. Refer to Modulation Selection Table.
3 CP1 I
Digital logic input used to select Spreading Range. This pin has an internal pull-up
resistor. Refer to Modulation Selection Table.
4 VSS P Ground to entire chip. Connect to system ground.
5 SSON# I
Digital logic input used to enable Spread Spectrum function (Active LOW). Spread
Spectrum function enabled when LOW, disabled when HIGH.
This pin has an internal pull-low resistor.
6 ModOUT O Spread spectrum clock output.
7 SR0 I
Digital logic input used to select Spreading Range. This pin has an internal pull-up
resistor. Refer to Modulation Selection Table.
8 VDD P Power supply for the entire chip.
Modulation Selection
CP0 CP1 SR0
Spreading Range (± %)
Modulation Rate
(KHz)
32.5MHz 54MHz 65MHz 81MHz 108MHz
0 0 0 1.75 1.53 1.41 1.27 1.1
(FIN /40) * 62.89
KHz
0 0 1 1.89 1.7 1.55 1.4 1.2
0 1 0 1.39 1.2 1.1 1.0 0.9
0 1 1 2.1 1.85 1.7 1.55 1.35
1 0 0 0.74 0.6 0.57 0.52 0.45
1 0 1 1.1 0.93 0.86 0.77 0.68
1 1 0 0.32 0.3 0.28 0.26 0.23
1 1 1 0.58 0.5 0.45 0.4 0.36
PCS3P2042B
Rev. 2 | Page 3 of 7 | www.onsemi.com
Spread Spectrum Selection
The Modulation Selection Table defines the possible spread spectrum options. The optimal setting should minimize system
EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center
frequency. (Note: The center frequency is the frequency of the external reference input on CLKIN, pin1).
For example, PCS3P2042B is designed for high-resolution, flat panel applications and is able to support an XGA (1024 x
768) flat panel operating at 65MHz (FIN) clock speed. A spreading selection of CP0=0, CP1=1 and SR0=0 provides a
percentage deviation of ±1.00% from F
IN
. This results in the frequency on ModOUT being swept from 65.65 to 64.35MHz at
a modulation rate of 102.19KHz. Refer to Modulation Selection Table. The example in the following illustration is a common
EMI reduction method for a notebook LCD panel and has already been implemented by most of the leading OEM and mobile
graphic accelerator manufacturers.
Application Schematic for Mobile LCD Graphics Controllers
Modulated 65MHz signal with
±1.00% deviation and
modulation rate of 102.19KHz.
This signal is connected back
to the spread spectrum input
pin (SSIN) of the graphics
1
2
3
4
CLKIN
CP0
CP1
VSS
SR0
5
6
7
8
SSON#
ModOUT
VDD
65MHz from graphics accelerator
+3.3V
0.1µF
PCS3P2042B
Digital control for the SS enable
or disable.
P1-P3P4-P6P7-P7

PCS3P2042BG-08TR

Mfr. #:
Buy PCS3P2042BG-08TR
Manufacturer:
ON Semiconductor
Description:
IC CLK EMI REDUCTION FREQ 8TSSOP
Lifecycle:
New from this manufacturer.
Delivery:
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