74VCX16839MTDX

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74VCX16839
DC Electrical Characteristics (2.3V V
CC
2.7V)
Note 6: Outputs disabled or 3-STATE only.
DC Electrical Characteristics (1.65V V
CC
< 2.3V)
Note 7: Outputs disabled or 3-STATE only.
Symbol Parameter Conditions
V
CC
(V)
Min Max Units
V
IH
HIGH Level Input Voltage 2.3 2.7 1.6 V
V
IL
LOW Level Input Voltage 2.3 2.7 0.7 V
V
OH
HIGH Level Output Voltage I
OH
= 100 µA2.3 2.7 V
CC
0.2
V
I
OH
= 6 mA 2.3 2.0
I
OH
= 12 mA 2.3 1.8
I
OH
= 18 mA 2.3 1.7
V
OL
LOW Level Output Voltage I
OL
= 100 µA2.3 2.7 0.2
VI
OL
= 12 mA 2.3 0.4
I
OL
= 18 mA 2.3 0.6
I
I
Input Leakage Current 0V V
I
3.6V 2.3 2.7 ±5.0 µA
I
OZ
3-STATE Output Leakage 0V V
O
3.6V
2.3 2.7 ±10 µA
V
I
= V
IH
or V
IL
I
OFF
Power-OFF Leakage Current 0V (V
I
, V
O
) 3.6V 0 10 µA
I
CC
Quiescent Supply Current V
I
= V
CC
or GND
2.3 2.7
20
µA
V
CC
(V
I
, V
O
) 3.6V (Note 6) ±20
Symbol Parameter Conditions
V
CC
(V)
Min Max Units
V
IH
HIGH Level Input Voltage 1.65 - 2.3 0.65 × V
CC
V
V
IL
LOW Level Input Voltage 1.65 - 2.3 0.35 × V
CC
V
V
OH
HIGH Level Output Voltage I
OH
= 100 µA1.65 - 2.3V
CC
0.2
V
I
OH
= 6 mA 1.65 1.4
V
OL
LOW Level Output Voltage I
OL
= 100 µA 1.65 - 2.3 0.2
V
I
OL
= 6 mA 1.65 0.3
I
I
Input Leakage Current 0V V
I
3.6V 1.65 - 2.3 ±5.0 µA
I
OZ
3-STATE Output Leakage 0V V
O
3.6V
1.65 - 2.3 ±10 µA
V
I
= V
IH
or V
IL
I
OFF
Power-OFF Leakage Current 0V (V
I
, V
O
) 3.6V 0 10 µA
I
CC
Quiescent Supply Current V
I
= V
CC
or GND
1.65 - 2.3
20
µA
V
CC
(V
I
, V
O
) 3.6V (Note 7) ±20
5 www.fairchildsemi.com
74VCX16839
AC Electrical Characteristics VCX16839 (Note 8)
Note 8: For C
L
= 50
P
F, add approximately 300 ps to the AC maximum specification.
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Extended AC Electrical Characteristics (Note 10)
Note 10: This parameter is guaranteed by characterization but not tested.
Dynamic Switching Characteristics
Capacitance
Symbol Parameter
T
A
= 40°C to +85°C, C
L
= 30 pF, R
L
= 500
UnitsV
CC
= 3.3V ± 0.3V V
CC
= 2.5V ± 0.2V V
CC
= 1.8V ± 0.15V
Min Max Min Max Min Max
f
MAX
Maximum Clock Frequency 250 200 100 MHz
t
PHL
Propagation Delay I
n
to O
n
0.8 2.5 1.0 3.5 1.5 7.0 ns
t
PLH
(REGE = 0)
t
PHL
Propagation Delay CLK to O
n
0.8 3.2 1.0 4.4 1.5 8.8 ns
t
PLH
(REGE = 1)
t
PHL
, t
PLH
Propagation Delay REGE to O
n
0.8 4.0 1.0 5.0 1.5 9.8 ns
t
PZL
, t
PZH
Output Enable Time 0.8 3.8 1.0 4.9 1.5 9.8 ns
t
PLZ
, t
PHZ
Output Disable Time 0.8 3.7 1.0 4.2 1.5 7.6 ns
t
S
Setup Time 1.0 1.0 2.5 ns
t
H
Hold Time 0.7 0.7 1.0 ns
t
W
Pulse Width 1.5 1.5 4.0 ns
t
OSHL
Output to Output Skew
0.5 0.5 0.75 ns
t
OSLH
(Note 9)
Symbol Parameter
T
A
= 0°C to +85°C, R
L
= 500 V
CC
= 3.3V ± 0.3V
UnitsC
L
= 50 pF
Min Max
t
PHL
, t
PLH
Propagation Delay I
n
to O
n
(REGE = 0) 1.0 2.8 ns
t
PHL
, t
PLH
Propagation Delay CLK to O
n
(REGE = 1) 1.4 3.5 ns
t
PHL
, t
PLH
Propagation Delay REGE to O
n
1.0 4.3 ns
t
PZL
, t
PZH
Output Enable Time 1.0 4.1 ns
t
PLZ
, t
PHZ
Output Disable Time 1.0 4.0 ns
t
S
Setup Time 1.0 ns
t
H
Hold Time 0.7 ns
Symbol Parameter Conditions
V
CC
(V)
T
A
= +25°C
Units
Typical
V
OLP
Quiet Output Dynamic Peak V
OL
C
L
= 30 pF, V
IH
= V
CC
, V
IL
= 0V 1.8 0.25
V2.5 0.6
3.3 0.8
V
OLV
Quiet Output Dynamic Valley V
OL
C
L
= 30 pF, V
IH
= V
CC
, V
IL
= 0V 1.8 0.25
V2.5 0.6
3.3 0.8
V
OHV
Quiet Output Dynamic Valley V
OH
C
L
= 30 pF, V
IH
= V
CC
, V
IL
= 0V 1.8 1.5
V2.5 1.9
3.3 2.2
Symbol Parameter Conditions
T
A
= +25°C
Units
Typical
C
IN
Input Capacitance V
CC
= 1.8V, 2.5V or 3.3V, V
I
= 0V or V
CC
6pF
C
OUT
Output Capacitance V
I
= 0V or V
CC
, V
CC
= 1.8V, 2.5V or 3.3V 7 pF
C
PD
Power Dissipation Capacitance V
I
= 0V or V
CC
, f = 10 MHz, 20 pF
V
CC
= 1.8V, 2.5V or 3.3V
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74VCX16839
AC Loading and Waveforms
FIGURE 1. AC Test Circuit
FIGURE 2. Waveform for Inverting and
Non-Inverting Functions
FIGURE 3. 3-STATE Output High Enable and
Disable Times for Low Voltage Logic
FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic
FIGURE 5. Propagation Delay, Pulse Width and
t
rec
Waveforms
FIGURE 6. Setup Time, Hold Time and
Recovery Time for Low Voltage Logic
TEST SWITCH
t
PLH
, t
PHL
Open
t
PZL
, t
PLZ
6V at V
CC
= 3.3 ± 0.3V;
V
CC
x 2 at V
CC
= 2.5 ± 0.2V; 1.8V ± 0.15V
t
PZH
, t
PHZ
GND
Symbol
V
CC
3.3V ± 0.3V 2.5V ± 0.2V 1.8V ± 0.15V
V
mi
1.5V V
CC
/2 V
CC
/2
V
mo
1.5V V
CC
/2 V
CC
/2
V
X
V
OL
+0.3V V
OL
+0.15V V
OL
+0.15V
V
Y
V
OH
0.3V V
OH
0.15V V
OH
0.15V

74VCX16839MTDX

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Registers 20-Bit Sel Reg/Buf
Lifecycle:
New from this manufacturer.
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