4
FN7360.5
November 5, 2007
V
EN_HI
EN Input High Level 2.6 V
V
EN_LO
EN Input Low Level 1V
I
EN
Enable Pull-up Current V
EN
= 0 -4 -2.5 µA
TM, S
EL_HI
Input High Level 2.6 V
TM, S
EL_LO
Input Low Level 1V
DC Electrical Specifications V
DD
= V
IN
= 3.3V, T
A
= T
J
= +25°C, C
OSC
= 390pF, Unless Otherwise Specified
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
Pin Descriptions
PIN NUMBER PIN NAME PIN FUNCTION
1 COMP Error amplifier output; place loop compensation components here
2 VREF Bandgap reference bypass capacitor; typically 0.01µF to 0.047µF to SGND
3 FB Voltage feedback input; connected to external resistor divider between V
OUT
and SGND for adjustable
output; also used for speed-up capacitor connection
4 VO Output sense for fixed output; also used for speed-up capacitor connection
5 VTJ Junction temperature monitor output, connected to a 0.01µF - 0.047µF to SGND
6 TM Stress test enable; allows ±5% output movement; needs a pull-down resistor (1k - 100k); connect to
SGND if function is not used
7 SEL Positive or negative voltage margining set pin; needs a pull-down resistor (1k - 100k); connect to SGND
if function is not used
8, 9, 10, 11, 12, 13 LX Inductor drive pin; high current output whose average voltage equals the regulator output voltage
14, 15 NC Not used
16, 17, 18 PGND Ground return of the regulator; connected to the source of the low-side synchronous NMOS Power FET
19, 20, 21 VIN Power supply input of the regulator; connected to the drain of the high-side PMOS Power FET
22 VDD Control circuit positive supply; connected to V
IN
through an internal 20Ω resistor
23 PG Power-good window comparator output; logic 1 when regulator output is within ±10% of target output
voltage
24 EN Chip enable, active high; a 2µA internal pull-up current enables the device if the pin is left open; a
capacitor can be added at this pin to delay the start of a converter
25 STP Auxilliary supply tracking positive input; tied to regulator output to synchronize start-up with a second
supply; leave open for standalone operation; 2µA internal pull-up current
26 STN Auxiliary supply tracking negative input; connect to output of a second supply to synchronize start-up;
leave open for standalone operation; 2µA internal pull-up current
27 COSC Oscillator timing capacitor (see performance curves)
28 SGND Control circuit negative supply or signal ground
EL7554
5
FN7360.5
November 5, 2007
Block Diagram
DRIVERS
PWM
CONTROLLER
POWER
TRACKING
CURRENT
SENSE
VOLTAGE
REFERENCE
OSCILLATOR
2.2nF
STP
STN
SGND
POWER
POWER
FET
FET
220pF0.018µF
2.2µH
V
OUT
(UP TO 4A)
47µF
V
REF
C
OSC
PGND
V
TJ
FB
EN
-
+
PG
V
REF
V
IN
V
IN
V
DD
2x10µF
V
O
R
2
V
DD
TM
SEL
20Ω
EA
COMP
0.22µF
V
DD
R
1
R
C
C
C
JUNCTION
TEMPERATURE
EL7554
6
FN7360.5
November 5, 2007
Typical Performance Curves
V
IN
= V
D
= 3.3V, V
O
= 1.8V, I
O
= 4A, L = 2.2µH, C
IN
= 2x10µF, C
OUT
= 47µF, C
OSC
= 220pF, T
A
= +25°C unless otherwise noted.
FIGURE 1. EFFICIENCY (V
IN
= 5V)
FIGURE 2. EFFICIENCY (V
IN
= 3.3V)
FIGURE 3. V
REF
vs TEMPERATURE
FIGURE 4. V
TJ
vs TEMPERATURE
FIGURE 5. V
EN_HI
& V
EN_LOW
vs V
DD
FIGURE 6. F
S
vs C
OSC
1
0.7
0.65
0.6
01 4
EFFICIENCY (%)
I
O
(A)
0.9
V
O
=3.3V
0.8
0.85
23
V
O
=2.5V
V
O
=0.8V
V
O
=1V
V
O
=1.2V
V
O
=1.8V
0.75
0.95
100
70
65
60
01 4
EFFICIENCY (%)
I
O
(A)
90
V
O
=2.5V
80
85
23
V
O
=0.8V
V
O
=1V
V
O
=1.2V
V
O
=1.8V
75
95
1.266
1.25
1.246
-50 150
V
REF
JUNCTION TEMPERATURE
1.254
50
1.258
1.262
0
100
V
DD
=3.3V
V
DD
=5V
1.248
1.252
1.256
1.26
1.264
1.6
0.9
-50 150
V
TJ
JUNCTION TEMPERATURE
1.2
500
100
V
DD
=3.3V
V
DD
=5V
1
1.1
1.3
1.4
1.5
4
2
1.5
1
3456
V
DD
(V)
3.5
V
EN_HI
V
EN_LOW
2.5
3
3.5 4.5 5.5
1200
500
200
0
100 300 500 700
F
S
(kHz)
C
OSC
(pF)
1000
V
DD
=3.3V
V
DD
=5V
600
800
200 400 600
EL7554

EL7554IREZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Voltage Regulators LDFREE 7554 6 AMP DC:DC STP DWNG
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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