MAX660
CMOS Monolithic Voltage Converter
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frequency eight times. In the third mode, the oscillator
frequency is lowered by connecting a capacitor
between OSC and GND. FC can still multiply the fre-
quency by eight times in this mode, but for a lower
range of frequencies (see Typical Operating
Characteristics).
In the inverter mode, OSC may also be overdriven by an
external clock source that swings within 100mV of V+
and GND. Any standard CMOS logic output is suitable
for driving OSC. When OSC is overdriven, FC has no
effect. Also, LV must be grounded when overdriving
OSC. Do not overdrive OSC in voltage-doubling mode.
Note: In all modes, the frequency of the signal appear-
ing at CAP+ and CAP- is one-half that of the oscillator.
Also, an undesirable effect of lowering the oscillator fre-
quency is that the effective output resistance of the
charge pump increases. This can be compensated by
increasing the value of the charge-pump capacitors
(see Capacitor Selection section and Typical Operating
Characteristics).
In some applications, the 5kHz output ripple frequency
may be low enough to interfere with other circuitry. If
desired, the oscillator frequency can then be increased
through use of the FC pin or an external oscillator as
described above. The output ripple frequency is one-
half the selected oscillator frequency. Increasing the
clock frequency increases the MAX660’s quiescent
current, but also allows smaller capacitance values to
be used for C1 and C2.
________________Capacitor Selection
Three factors (in addition to load current) affect the
MAX660 output voltage drop from its ideal value:
1) MAX660 output resistance
2) Pump (C1) and reservoir (C2) capacitor ESRs
3) C1 and C2 capacitance
The voltage drop caused by MAX660 output resistance
is the load current times the output resistance.
Similarly, the loss in C2 is the load current times C2’s
ESR. The loss in C1, however, is larger because it
handles currents that are greater than the load current
during charge-pump operation. The voltage drop due
to C1 is therefore about four times C1’s ESR multiplied
by the load current. Consequently, a low (or high) ESR
capacitor has a much greater impact on performance
for C1 than for C2.
Generally, as the pump frequency of the MAX660
increases, the capacitance values required to maintain
comparable ripple and output resistance diminish pro-
portionately. The curves of Figure 2 show the total circuit
output resistance for various capacitor values (the pump
and reservoir capacitors’ values are equal) and oscillator
frequencies. These curves assume 0.25Ω capacitor ESR
and a 5.25Ω MAX660 output resistance, which is why
the flat portion of the curve shows a 6.5Ω (R
O
MAX660 +
4 (ESR
C1
) + ESR
C2
) effective output resistance. Note:
R
O
= 5.25Ω is used, rather than the typical 6.5Ω,
because the typical specification includes the effect of
the ESRs of the capacitors in the test circuit.
In addition to the curves in Figure 2, four bar graphs in
the Typical Operating Characteristics show output cur-
rent for capacitances ranging from 0.33µF to 220µF.
Output current is plotted for inputs of 4.5V (5V-10%) and
3.0V (3.3V-10%), and allow for 10% and 20% output
droop with each input voltage. As can be seen from the
graphs, the MAX660 6.5Ω series resistance limits
increases in output current vs. capacitance for values
much above 47µF. Larger values may still be useful,
however, to reduce ripple.
To reduce the output ripple caused by the charge
pump, increase the reservoir capacitor C2 and/or
reduce its ESR. Also, the reservoir capacitor must have
low ESR if filtering high-frequency noise at the output is
important.
Not all manufacturers guarantee capacitor ESR in the
range required by the MAX660. In general, capacitor ESR
is inversely proportional to physical size, so larger capaci-
tance values and higher voltage ratings tend to reduce
ESR.
