LTC3721-1
7
sn37211 37211fs
FB (Pin 13/Pin 12): Error Amplifier Inverting Input. This is
the voltage feedback input for the LTC3721-1. The nomi-
nal regulation voltage at FB is 1.2V.
SS (Pin 14/Pin 13): Soft-Start/Restart Delay Circuitry
Timing Capacitor. A capacitor from SS to GND provides a
controlled ramp of the current command. During overload
conditions, SS is discharged to ground initiating a soft-
start cycle. SS charging current is approximately 13µA. SS
will charge up to approximately 5V in normal operation.
During a constant overload current fault, SS will oscillate
at a low frequency between approximately 0.5V and 4V.
DESCRIPTIO S
U
PI
U
UVLO (Pin 15/Pin 14): Input to Program System Turn-On
and Turn-Off Voltages. The nominal threshold of the UVLO
comparator is 5.0V. UVLO is connected to the main DC
system feed through a resistor divider. When the UVLO
threshold is exceeded, the LTC3721-1 commences a soft-
start cycle and a 10µA (nominal) current is fed out of UVLO
to program the desired amount of system hysteresis. The
hysteresis level can be adjusted by changing the resis-
tance of the divider. UVLO can also be used to terminate
all switching by pulling UVLO down to less than 4V. An
open drain or collector switch can perform this function
without changing the system turn on or turn off voltages.
NC (Pin 2, Pin 3, Pin 16/Pin 7, Pin 16): Not Connected.
(GN Package/UF Package)
PROGRAMMABLE
DEAD-TIME
DRVA
DRVB
37211 TD01
CURRENT
SENSE
OR C
T
RAMP
PWM
COMPARATOR
(–)
TI I G DIAGRA
WUW
LTC3721-1
8
sn37211 37211fs
BLOCK DIAGRA S
W
RQ
S
Q
T
1.5A SINK
1A SOURCE
DRVA
Q
RQ
S
DRVB
1.5A SINK
1A SOURCE
FAULT
LOGIC
OSCILLATOR
SLOPE
COMPENSATOR
PULSE-BY-PULSE
CURRENT LIMIT
300mV
37211 BD01
C
T
DPRG
PULSE WIDTH
MODULATOR
ERROR
AMPLIFIER
+
SHUTDOWN
CURRENT
LIMIT
V
REF
13µA
50k
14.9k
600mV
+
+
BLANK
R
LEB
CS
SS
COMP
1.2V
FB
+
SYSTEM
UVLO
V
CC
V
CC
GOOD
10µA
5V
+
+
650mV
UVLO
REF, LDO
1.2V
5V
REF GOOD
V
REF
V
CC
UVLO
10.25V “ON”
6V “OFF”
V
CC
GND
+
LTC3721-1 Block Diagram
LTC3721-1
9
sn37211 37211fs
OPERATIO
U
Please refer to the detailed Block Diagram for this discus-
sion. The LTC3721-1 is a PWM push-pull controller that
operates with pulse-by-pulse peak current mode control.
It is best suited for moderate to high power isolated power
systems where small size and high efficiency are required.
The push-pull topology delivers excellent transformer
utilization and requires only two low side power MOSFET
switches. The controller generates 180° out of phase
0% to < 50% duty cycle drive signals on DRVA and DRVB.
The external MOSFETs are driven directly by these power-
ful on-chip drivers. The external MOSFETs typically con-
trol opposite primary windings of a centertapped power
transformer. The centertap primary winding is connected
to the input DC feed. The secondary of the transformer can
be configured in different synchronous or nonsynchronous
configurations depending on the application needs.
The duty ratio is controlled by the voltage on COMP. A
switching cycle commences with the falling edge of the
internal oscillator clock pulse. The LTC3721-1 attenuates
the voltage on COMP and compares it to the current sense
signal to terminate the switching cycle. If the voltage on CS
exceeds 300mV, the present cycle is terminated. If the
voltage on CS exceeds 600mV, all switching stops and a
soft-start sequence is initiated.
A host of other features including an error amplifier,
system UVLO programming, adjustable leading edge blank-
ing, slope compensation and programmable dead-time
provide flexibility for a variety of applications.
Programming Driver Dead-Time
The LTC3721-1 includes a feature to program the mini-
mum time between the output signals on DRVA and DRVB
commonly referred to as the driver dead-time. This func-
tion will come into play if the controller is commanded for
maximum duty cycle. The dead-time is set with an
external resistor connected between DPRG and V
REF
(see
Figure 1). The nominal regulated voltage on DPRG is 2V.
The external resistor programs a current which flows into
DPRG. The dead-time can be adjusted from 90ns to 300ns
with this resistor. The dead-time can also be modulated
based on an external current source that feeds current into
DPRG. Care must be taken to limit the current fed into
DPRG to 350µA or less. An internal 10µA current source
sets a maximum deadtime if DPRG is floated. The internal
current source causes the programmed deadtime to vary
non-linearly with increasing values of R
DPRG
(see Typical
Performance Characteristics). An external 200k resistor
connected from DPRG to GND will compensate for the
internal 10µA current source and linearize the deadtime
delay vs R
DPRG
characteristic.
Powering the LTC3721-1
The LTC3721-1 utilizes an integrated V
CC
shunt regulator
to serve the dual purposes of limiting the voltage applied
to V
CC
as well as signaling that the chip’s bias voltage is
sufficient to begin switching operation (under voltage
lockout). With its typical 10.2V turn-on voltage and 4.2V
UVLO hysteresis, the LTC3721-1 is tolerant of loosely
regulated input sources such as an auxiliary transformer
winding. The V
CC
shunt is capable of sinking up to 40mA
of externally applied current. The UVLO turn-on and turn-
off thresholds are derived from an internally trimmed
reference making them extremely accurate. In addition,
the LTC3721-1 exhibits very low (145µA typ) start-up
current that allows the use of 1/8W to 1/4W trickle charge
start-up resistors.
The trickle charge resistor should be selected as follows:
R
START(MAX)
= V
IN(MIN)
– 10.7V/250µA
Adding a small safety margin and choosing standard
values yields:
APPLICATION V
IN
RANGE R
START
DC/DC 36V to 72V 100k
Off-Line 85V to 270V
RMS
430k
PFC Preregulator 390V
DC
1.4M
+
TURN-ON
OUTPUT
2.5V
+
V
2V
V
REF
DPRG
R
DPRG
37211 F01
200k
OPTIONAL
Figure 1. Deadtime Adjust

JANTX1N647-1

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Rectifiers Switching Diode
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union