PCA9533_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 27 April 2009 4 of 24
NXP Semiconductors
PCA9533
4-bit I
2
C-bus LED dimmer
6. Functional description
Refer to Figure 1 “Block diagram of PCA9533”.
6.1 Device address
Following a START condition, the bus master must output the address of the slave it is
accessing. The address of the PCA9533/01 is shown in Figure 4 and the address of
PCA9533/02 is shown in Figure 5.
The last bit of the address byte defines the operation to be performed. When set to logic 1
a read is selected, while a logic 0 selects a write operation.
6.2 Control register
Following the successful acknowledgement of the slave address, the bus master will send
a byte to the PCA9533, which will be stored in the Control register.
The lowest 3 bits are used as a pointer to determine which register will be accessed.
If the Auto-Increment (AI) flag is set, the three low order bits of the Control register are
automatically incremented after a read or write. This allows the user to program the
registers sequentially. The contents of these bits will rollover to ‘000’ after the last register
is accessed.
When Auto-Increment flag is set (AI = 1) and a read sequence is initiated, the sequence
must start by reading a register different from the INPUT register (B2 B1 B0 0 0 0).
Only the 3 least significant bits are affected by the AI flag. Unused bits must be
programmed with zeroes.
SCL 6 serial clock line
SDA 7 serial data line
V
DD
8 supply voltage
Table 3. Pin description
…continued
Symbol Pin Description
Fig 4. PCA9533/01 slave address Fig 5. PCA9533/02 slave address
002aae627
1 1 0 0 0 1 0 R/W
slave address
002aae628
1 1 0 0 0 1 1 R/W
slave address
Reset state: 00h
Fig 6. Control register
B0
002aad744
0 0 0 AI 0 B2 B1
register address
Auto-Increment
flag
PCA9533_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 27 April 2009 5 of 24
NXP Semiconductors
PCA9533
4-bit I
2
C-bus LED dimmer
6.2.1 Control register definition
6.3 Register descriptions
6.3.1 INPUT - Input register
The INPUTregister reflects the state of the device pins. Writes to this register will be
acknowledged but will have no effect.
Remark: The default value ‘X’ is determined by the externally applied logic level (normally
logic 1) when used for directly driving LED with pull-up to V
DD
.
6.3.2 PCS0 - Frequency Prescaler 0
PSC0 is used to program the period of the PWM output.
The period of BLINK0 = (PSC0 + 1) / 152.
6.3.3 PWM0 - Pulse Width Modulation 0
The PWM0 register determines the duty cycle of BLINK0. The outputs are LOW (LED on)
when the count is less than the value in PWM0 and HIGH (LED off) when it is greater. If
PWM0 is programmed with 00h, then the PWM0 output is always HIGH (LED off).
The duty cycle of BLINK0 = PWM0 / 256.
Table 4. Register summary
B2 B1 B0 Symbol Access Description
0 0 0 INPUT read only input register
0 0 1 PSC0 read/write frequency prescaler 0
0 1 0 PWM0 read/write PWM register 0
0 1 1 PSC1 read/write frequency prescaler 1
1 0 0 PWM1 read/write PWM register 1
1 0 1 LS0 read/write LED selector
Table 5. INPUT - Input register description
Bit 7 6 5 4 3 2 1 0
Symbol ----LED3 LED2 LED1 LED0
Default 0000XXXX
Table 6. PSC0 - Frequency Prescaler 0 register description
Bit 7 6 5 4 3 2 1 0
Symbol PSC0[7] PSC0[6] PSC0[5] PSC0[4] PSC0[3] PSC0[2] PSC0[1] PSC0[0]
Default 00000000
Table 7. PWM0 - Pulse Width Modulation 0 register description
Bit 7 6 5 4 3 2 1 0
Symbol PWM0
[7]
PWM0
[6]
PWM0
[5]
PWM0
[4]
PWM0
[3]
PWM0
[2]
PWM0
[1]
PWM0
[0]
Default 10000000
PCA9533_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 27 April 2009 6 of 24
NXP Semiconductors
PCA9533
4-bit I
2
C-bus LED dimmer
6.3.4 PCS1 - Frequency Prescaler 1
PSC1 is used to program the period of the PWM output.
The period of BLINK1 = (PSC1 + 1) / 152.
6.3.5 PWM1 - Pulse Width Modulation 1
The PWM1 register determines the duty cycle of BLINK1. The outputs are LOW (LED on)
when the count is less than the value in PWM1 and HIGH (LED off) when it is greater. If
PWM1 is programmed with 00h, then the PWM1 output is always HIGH (LED off).
The duty cycle of BLINK1 = PWM1 / 256.
6.3.6 LS0 - LED selector
The LSn LED selector register determines the source of the LED data.
00 = output is set high-impedance (LED off; default)
01 = output is set LOW (LED on)
10 = output blinks at PWM0 rate
11 = output blinks at PWM1 rate
Table 8. PSC1 - Frequency Prescaler 1 register description
Bit 7 6 5 4 3 2 1 0
Symbol PSC1[7] PSC1[6] PSC1[5] PSC1[4] PSC1[3] PSC1[2] PSC1[1] PSC1[0]
Default 00000000
Table 9. PWM1 - Pulse Width Modulation 1 register description
Bit 7 6 5 4 3 2 1 0
Symbol PWM1
[7]
PWM1
[6]
PWM1
[5]
PWM1
[4]
PWM1
[3]
PWM1
[2]
PWM1
[1]
PWM1
[0]
Default 10000000
Table 10. LS0 - LED selector register bit description
Legend: * default value.
Register Bit Value Description
LS0 7:6 00* LED3 selected
5:4 00* LED2 selected
3:2 00* LED1 selected
1:0 00* LED0 selected

PCA9533DP/01,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
LED Lighting Drivers I2C LED DIMMER 4BIT
Lifecycle:
New from this manufacturer.
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