This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TEST CIRCUITS
Figure 3. Break-Before-Make Interval
50 %
90 %
Logic
Input
Switch
Output
V
O
V
S
t
OPEN
t
r
< 5 ns
t
f
< 5 ns
0 V
3 V
0 V
V+
GNDV-
35 pF
V-
A
2
D
b
, D
All S and D
a
300
V
O
50
A
1
A
0
V
S1
EN
Return to Specifications:
Single Supply 12 V
Dual Supply V+ = 5 V, V- = - 5 V
Single Supply 5 V
Single Supply 3 V
Figure 4. Charge Injection
A
0
A
1
A
2
V
O
V+
GNDV-
D
V
g
R
g
S
X
C
L
1 nF
Channel
Select
3 V
0 V
OFFON
Logic
Input
Switch
Output
V
O
V
O
is the measured voltage due to charge transfer
error Q, when the channel turns off.
Q = C
L
x V
O
OFF
V+
V-
EN
Figure 5. Off Isolation
R
L
50
V
OUT
V+
GNDV-
A
2
D
A
1
A
0
S
8
S
X
R
g
= 50
Off Isolation = 20 log
V
OUT
V
IN
V
IN
V+
V-
EN
Figure 6. Crosstalk
R
L
50
V
OUT
V+
GNDV-
A
2
D
A
1
A
0
S
8
S
X
R
g
= 50
Crosstalk = 20 log
V
OUT
V
IN
V
IN
S
1
V+
V-
EN
R
IN
50
Document Number: 73410
S11-1066-Rev. B, 30-May-11
www.vishay.com
11
Vishay Siliconix
DG9051, DG9052, DG9053
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TEST CIRCUITS
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
