PSMN2R0-30YL All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 10 March 2011 3 of 14
NXP Semiconductors
PSMN2R0-30YL
N-channel 30 V 2 mΩ logic level MOSFET in LFPAK
4. Limiting values
[1] Continuous current is limited by package.
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
drain-source voltage T
j
≥ 25 °C; T
j
≤ 175 °C - 30 V
V
DSM
peak drain-source voltage t
p
≤ 25 ns; f ≤ 500 kHz;
E
DS(AL)
≤ 280 nJ; pulsed
-35V
V
DGR
drain-gate voltage T
j
≥ 25 °C; T
j
≤ 175 °C; R
GS
=20kΩ -30V
V
GS
gate-source voltage -20 20 V
I
D
drain current V
GS
=10V; T
mb
= 100 °C; see Figure 1
[1]
- 100 A
V
GS
=10V; T
mb
=25°C; see Figure 1;
see Figure 3
[1]
- 100 A
I
DM
peak drain current pulsed; t
p
≤ 10 µs; T
mb
=25°C;
see Figure 3
- 667 A
P
tot
total power dissipation T
mb
=25°C; see Figure 2 -97W
T
stg
storage temperature -55 175 °C
T
j
junction temperature -55 175 °C
Source-drain diode
I
S
source current T
mb
=25°C
[1]
- 100 A
I
SM
peak source current pulsed; t
p
≤ 10 µs; T
mb
= 25 °C - 667 A
Avalanche ruggedness
E
DS(AL)S
non-repetitive drain-source
avalanche energy
V
GS
=10V; T
j(init)
=25°C; I
D
= 100 A;
V
sup
≤ 30 V; R
GS
=50Ω; unclamped
- 151 mJ
Fig 1. Continuous drain current as a function of
mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
003aac471
0
20
40
60
80
100
120
0 50 100 150 200
T
mb
(°C)
I
D
(A)
(1)
T
mb
(°C)
0 20015050 100
03aa16
40
80
120
P
der
(%)
0
