9110-02CS14LF

7
AV9110
AV9110 Quartz Crystal Selection
When an external quartz crystal will be used as a frequency
reference for the AV9110, attention needs to be given to
crystal selection if accurate reference frequency and output
frequency is desired. The AV9110 uses a Pierce oscillator
design which operates the quartz crystal in parallel-resonant
mode. It requires a quartz crystal cut for parallel-resonant
operation to ensure an accurate frequency of oscillation (a
less expensive series-reso-nant crystal can be used with the
device but it will oscillate approximately 0.1% too fast). The
AV9110-01 has internal crystal load capacitors which result
in a total crystal load capacitance of approximately
12pF±10%.The AV9110-02 does not have internal load
capacitors, but contributes about 3pFload capacitance to the
crystal.
Following is a list of recommended crystal devices for the
AV9110. They have been tested by the crystal manufacturer
to operate suitably with the AV91xx-series crystal oscillator
de-sign, having load capacitance characteristics that are
compatible with the AV9110-01.
Toyocom
Part Number
TN4-30374 ........ 14.318 MHz surface mount crystal
TN4-30375 ........ 20 MHz surface mount crystal
TN4-30376 ........ 14.318 MHz through-hole crystal
TN4-30377 ........ 20 MHz through-hole crystal
Epson
Part Number
MA-505 or ......... Surface mount crystal
MA-506
CA-301 .............. Through-hole crystal
Using AV9110-01 with a crystal Using AV9110-01 with an external clock
Using AV9110-02 with a crystal Using AV9110-02 with an external clock
Figure 2 - Clock Reference Combinations
8
AV9110
AV9110 Recommended Board Layout
This is the recommended layout for the AV9110 to maximize clock performance. Shown are the power and ground connections,
the ground plane, and the input/output traces.
Use of the isolated ground plane and power connection, as shown, will prevent stray high frequency ground and system noise
from coupling to the AV9110. As when compared to using the system ground and power planes, this technique will lessen
output clock jitter. The isolated ground plane should be connected to the system ground plane at one point near the 2.2mF
decoupling cap. For lowest jitter performance, the isolated ground plane should be kept away from clock output pins and
traces. Keeping the isolated ground plane area as small as possible will minimize EMI radiation. Use a sufficient gap between
the isolated ground plane and system ground plane to prevent AC coupling. The ferrite bead in the VDD line is optional, but
will help reduce EMI.
The traces to distribute the output clocks should be over an unbroken system ground or power supply plane. The trace width
should be about two times the thickness of the PC board between the trace and the underlying plane. These guidelines help
minimize clock jitter and EMI radiation. The traces to distribute power should be as wide as possible.
9
AV9110
MHz
MHz
mA
%
AV9110 Typical Duty Cycle
VCO Output Divide, R = 1
Duty Cycle will improve if R > 1
AV9110 Idd
C
L
= pF, R = 1

9110-02CS14LF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Generators & Support Products Serial Programmable Low Jitter Clock
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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