P89LV51RB2_RC2_RD2_5 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 05 — 15 December 2009 63 of 76
NXP Semiconductors
P89LV51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
[1] This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
[2] Under steady state (non-transient) conditions, I
OL
must be externally limited as follows:
a) Maximum I
OL
per 8-bit port: 26 mA
b) Maximum I
OL
total for all outputs: 71 mA
c) If I
OL
exceeds the test condition, V
OH
may exceed the related specification. Pins are not guaranteed to sink current greater than the
listed test conditions.
[3] Capacitive loading on Ports 0 and 2 may cause spurious noise to be superimposed on the V
OL
of ALE and Ports 1 and 3. The noise due
to external bus capacitance discharging into the Port 0 and 2 pins when the pins make 1-to-0 transitions during bus operations. In the
worst cases (capacitive loading > 100 pF), the noise pulse on the ALE pin may exceed 0.8 V. In such cases, it may be desirable to
qualify ALE with a Schmitt trigger, or use an address latch with a Schmitt trigger STROBE input.
[4] Load capacitance for Port 0, ALE and PSEN = 100 pF, load capacitance for all other outputs = 80 pF.
[5] Capacitive loading on Ports 0 and 2 may cause the V
OH
on ALE and PSEN to momentarily fall below the V
DD
− 0.7 V specification when
the address bits are stabilizing.
[6] Pins of Ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
maximum value when V
I
is approximately 2 V.
[7] Pin capacitance is characterized but not tested. Pin EA = 25 pF (max).
V
OH
HIGH-level output voltage V
DD
= 2.7 V; ports 1, 2, 3,
ALE,
PSEN
[5]
I
OH
= −10 µAV
DD
− 0.3 - V
I
OH
= −30 µAV
DD
− 0.7 - V
I
OH
= −60 µAV
DD
− 1.5 - V
V
DD
= 2.7 V; port 0 in
External Bus mode
I
OH
= −200 µAV
DD
− 0.3 - V
I
OH
= −3.2 mA V
DD
− 0.7 - V
V
bo
brownout trip voltage 2.35 2.55 V
I
IL
LOW-level input current V
I
= 0.4 V; ports 1, 2, 3 - −75 µA
I
THL
HIGH-LOW transition current V
I
= 2 V; ports 1, 2, 3
[6]
- −650 µA
I
LI
input leakage current 0.45 V < V
I
<V
DD
− 0.3 V;
port 0
- ±10 µA
R
pd
pull-down resistance on pin RST - 225 kΩ
C
iss
input capacitance 1 MHz; T
amb
=25°C
[7]
-15pF
I
DD(oper)
operating supply current f
osc
= 12 MHz - 11.5 mA
f
osc
= 33 MHz - 30 mA
I
DD(idle)
Idle mode supply current f
osc
= 12 MHz - 8.5 mA
f
osc
= 33 MHz - 21 mA
I
DD(pd)
Power-down mode supply
current
minimum V
DD
=2V
T
amb
= 0 °C to +70 °C- 45µA
T
amb
= −40 °C to +85 °C- 55µA
Table 62. Static characteristics
…continued
T
amb
=0
°
C to +70
°
C or
−
40
°
Cto+85
°
C; V
DD
= 2.7 V to 3.6 V; V
SS
=0V.
Symbol Parameter Conditions Min Max Unit
