TLE 4271-2
Data Sheet 3 Rev. 2.7, 2007-06-25
Circuit Description
The control amplifier compares a reference voltage, which is kept highly accurate by
resistance adjustment, to a voltage that is proportional to the output voltage and drives
the base of a series transistor via a buffer. Saturation control as a function of the load
current prevents any over-saturation of the power element.
The reset output RO is in high-state if the voltage on the delay capacitor
C
D
is greater or
equal
V
UD
. The delay capacitor C
D
is charged with the current I
D
for output voltages
greater than the reset threshold
V
RT
. If the output voltage gets lower than V
RT
(‘reset
condition’) a fast discharge of the delay capacitor
C
D
sets in and as soon as V
D
gets
lower than
V
LD
the reset output RO is set to low-level.
The time for the delay capacitor charge from
V
UD
to V
LD
is the reset delay time t
D
.
When the voltage on the delay capacitor has reached
V
UD
and reset was set to high, the
watchdog circuit is enabled and discharges
C
D
with the constant current I
DWD
. If there is
no rising edge observed at the watchdog input,
C
D
will be discharge down to V
LDW
, then
reset output RO will be set to low and
C
D
will be charged again with the current I
DWC
until
V
D
reaches V
UD
and reset will be set high again.
If the watchdog pulse (rising edge at watchdog input WI) occurs during the discharge
period
C
D
is charged again and the reset output stays high. After V
D
has reached V
UD
,
the periodical behavior starts again.
Internal protection circuits protect the IC against:
• Overload
• Overvoltage
• Overtemperature
• Reverse polarity