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MAX4721EBL+T

P1-P3P4-P6P7-P9P10-P12P13-P14
MAX4721/MAX4722/MAX4723
4.5
Ω
Dual SPST Analog Switches in UCSP
_______________________________________________________________________________________ 7
RISE TIME TO FALL TIME MISMATCH
vs. SUPPLY VOLTAGE
MAX4721/22/23 toc12
SUPPLY VOLTAGE (V)
MISMATCH (ps)
4.53.52.5
100
200
300
400
0
1.5 5.5
INPUT RISE/FALL TIME = 15ns
FIGURE 3, C
L
= 50pF
RISE TIME TO FALL TIME MISMATCH
vs. TEMPERATURE
MAX4721/22/23 toc13
TEMPERATURE (°C)
MISMATCH (ps)
603510-15
50
100
150
200
0
-40 85
INPUT RISE/FALL TIME = 15ns
FIGURE 3, C
L
= 50pF
V+ = 4.2V
SKEW vs. SUPPLY VOLTAGE
MAX4721/22/23 toc14
SUPPLY VOLTAGE (V)
SKEW (ps)
4.53.52.5
100
200
300
400
0
1.5 5.5
INPUT RISE/FALL TIME = 15ns
FIGURE 3, C
L
= 50pF
SKEW vs. TEMPERATURE
MAX4721/22/23 toc15
TEMPERATURE (°C)
SKEW (ps)
603510-15
50
100
150
200
0
-40 85
INPUT RISE/FALL TIME = 15ns
FIGURE 3, C
L
= 50pF
V+ = 4.2V
FREQUENCY RESPONSE
MAX4721/22/23 toc16
FREQUENCY (MHz)
ON-LOSS (dB)
10.01
-120
-100
-80
-60
-40
-20
0
20
-140
0.0001 100
V+ = 3V/5V
ON-LOSS
OFF-ISOLATION
CROSSTALK
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
MAX4721/22/23 toc17
FREQUENCY (Hz)
THD (%)
10k1k100
0.1
10 100k
1
0.01
V+ = 3V
R
L
= 600Ω
LOGIC THRESHOLD vs. SUPPLY VOLTAGE
MAX4721/22/23 toc18
SUPPLY VOLTAGE (V)
LOGIC THRESHOLD (V)
5.04.54.03.53.02.52.0
0.4
0.8
1.2
1.6
2.0
0
1.5 5.5
V
TH+
V
TH-
Typical Operating Characteristics (continued)
(T
A
= +25°C, unless otherwise noted.)
MAX4721/MAX4722/MAX4723
4.5
Ω
Dual SPST Analog Switches in UCSP
8 _______________________________________________________________________________________
Detailed Description
The MAX4721/MAX4722/MAX4723 dual SPST analog
switches operate from a single +1.8V to +5.5V supply.
The MAX4721/MAX4722/MAX4723 offer excellent AC
characteristics, <0.5nA leakage current, less than 2ms
differential skew, and 15pF on-channel capacitance. All
of these devices are CMOS-logic compatible with rail-
to-rail signal handling capability.
The MAX4721/MAX4722/MAX4723 are USB-compliant
switches that provide 4.5Ω (max) on-resistance, and
15pF on-channel capacitance to maintain signal integri-
ty. At 12Mbps (USB full-speed data rate specification)
the MAX4721/MAX4722/MAX4723 introduce less than
2ns propagation delay between input and output sig-
nals and less than 0.5ns change in skew for the output
signals (see Figure 3 for more details).
The MAX4721 has two normally open (NO) switches, the
MAX4722 has two normally closed (NC) switches, and
the MAX4723 has one NO switch and one NC switch.
Applications Information
Digital Control Inputs
The MAX4721/MAX4722/MAX4723 logic inputs accept
up to +5.5V regardless of supply voltage. For example,
with a +3.3V supply, IN_ can be driven low to GND and
high to +5.5V allowing for mixing of logic levels in a
system. Driving the control logic inputs rail-to-rail mini-
mizes power consumption. For a +3.0V supply voltage,
the logic thresholds are 0.5V (low) and 1.4V (high); for
a +5V supply voltage, the logic thresholds are 0.8V
(low) and 2.0V (high).
Analog Signal Levels
Analog signals that range over the entire supply voltage
(V+ to GND) are passed with very little change in on-resis-
tance (see the Typical Operating Characteristics). The
switches are bidirectional, so the NO_, NC_, and COM_
pins can be either inputs or outputs.
PIN
MAX4721
MAX4722 MAX4723
UCSP µMAX UCSP µMAX UCSP µMAX
NAME
FUNCTION
A1 3 A1 3 A1 3 IN2 Logic-Control Digital Input
A2 4 A2 4 A2 4 GND Ground. Connect to digital ground.
A3 5 —— — —NO2 Analog-Switch Normally Open Terminal
B1 2 B1 2 B1 2 COM1 Analog-Switch Common Terminal
B3 6 B3 6 B3 6 COM2 Analog-Switch Common Terminal
C1 1 ——C1 1 NO1 Analog-Switch Normally Open Terminal
C2 8 C2 8 C2 8 V+ Positive Analog Supply
C3 7 C3 7 C3 7 IN1 Logic-Control Digital Input
——C1 1 ——NC1 Analog-Switch Normally Closed Terminal
——A3 5 A3 5 NC2 Analog-Switch Normally Closed Terminal
Pin Description
Power-Supply Bypassing
Power-supply bypassing improves noise margin and
prevents switching noise from propagating from the V+
supply to other components. A 0.1µF capacitor connect-
ed from V+ to GND is adequate for most applications.
Power-Supply Sequencing
and Overvoltage Protection
Caution: Do not exceed the absolute maximum rat-
ings because stresses beyond the listed ratings may
cause permanent damage to the device.
UCSP Package Considerations
For general UCSP package information and PC layout
considerations, please refer to the Maxim Application
Note (Wafer-Level Chip-Scale Package).
UCSP Reliability
The chip-scale package (UCSP) represents a unique
packaging form factor that may not perform equally to a
packaged product through traditional mechanical relia-
bility tests. UCSP reliability is integrally linked to the
user’s assembly methods, circuit board material, and
usage environment. The user should closely review
these areas when considering use of a UCSP package.
Performance through Operating Life Test and Moisture
Resistance remains uncompromised as it is primarily
determined by the wafer-fabrication process.
Mechanical stress performance is a greater considera-
tion for a UCSP package. UCSPs are attached through
direct solder contact to the user’s PC board, foregoing
the inherent stress relief of a packaged product lead
frame. Solder joint contact integrity must be consid-
ered. Information on Maxim’s qualification plan, test
data, and recommendations are detailed in the UCSP
application note, which can be found on Maxim’s web-
site at www.maxim-ic.com.
MAX4721/MAX4722/MAX4723
4.5
Ω
Dual SPST Analog Switches in UCSP
_______________________________________________________________________________________ 9
Test Circuits/Timing Diagrams
50%
V
IL
LOGIC
INPUT
R
L
COM_
GND
IN_
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
OUT
= V
COM
V
N_
V
IH
t
OFF
0V
NO_
OR NC_
0.9 x V
0UT
0.9 x V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V+
C
L
V+
V
OUT
MAX4721/
MAX4722/
MAX4723
(
R
L
R
L
- R
ON
)
Figure 1. Switching Time
LOGIC
INPUT
R
L2
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO_
IN_
NC_
V
OUT2
V+
V+
C
L2
MAX4723
R
L1 C
L1
V
OUT1
V
COM1
V
COM2
50%
0.9 x V
0UT1
V
IH
V
IL
0V
LOGIC
INPUT
SWITCH
OUTPUT 2
(V
OUT2
)
0V
0.9 x V
OUT2
t
D
t
D
SWITCH
OUTPUT 1
(V
OUT1
)
COM2
COM1
Figure 2. Break-Before-Make Interval
P1-P3P4-P6P7-P9P10-P12P13-P14

MAX4721EBL+T

Mfr. #:
Buy MAX4721EBL+T
Manufacturer:
Maxim Integrated
Description:
Analog Switch ICs 4.5Ohm Dual SPST Analog Switch
Lifecycle:
New from this manufacturer.
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