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74LVTH32245GX

P1-P3P4-P6
© 2002 Fairchild Semiconductor Corporation DS500433 www.fairchildsemi.com
March 2002
Revised June 2002
74LVT32245 • 74LVTH32245 Low Voltage 32-Bit Transceiver with 3-STATE Outputs
74LVT32245 • 74LVTH32245
Low Voltage 32-Bit Transceiver with 3-STATE Outputs
General Description
The LVT32245 and LVTH32245 contain thirty-two non-
inverting bidirectional buffers with 3-STATE outputs and are
intended for bus oriented applications. The devices are
byte controlled. Each byte has separate control inputs
which can be shorted together for full 32-bit operation. The
T/R
inputs determine the direction of data flow through the
device. The OE
inputs disable both the A and B ports by
placing them in a high impedance state.
The LVTH32245 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These non-inverting transceivers are designed for low volt-
age (3.3V) V
CC
applications, but with the capability to pro-
vide a TTL interface to a 5V environment. The LVT32245
and LVTH32245 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining low power dissipation.
Features
■ Input and output interface capability to systems at
5V V
CC
■ Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH32245),
also available without bushold feature (74LVT32245).
■ Live insertion/extraction permitted
■ Power Up/Down high impedance provides glitch-free
bus loading
■ Outputs source/sink
−32 mA/+64 mA
■ ESD performance:
Human-body model
> 2000V
Machine model
> 200V
Charged-device model
> 1000V
■ Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Ordering Code:
Note 1: Ordering code “G” indicates Trays.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Order Number Package Number Package Description
74LVT32245G
(Note 1)(Note 2)
BGA96A
(Preliminary)
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVTH32245G
(Note 1)(Note 2)
BGA96A 96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
www.fairchildsemi.com 2
74LVT32245 • 74LVTH32245
Connection Diagram
(Top Thru View)
Pin Descriptions
FBGA Pin Assignments
Truth Tables
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Pin Names Description
OE
n
Output Enable Input (Active LOW)
T/R
n
Transmit/Receive Input
A
0
–A
31
Side A Inputs/3-STATE Outputs
B
0
–B
31
Side B Inputs/3-STATE Outputs
123456
A B
1
B
0
T/R
1
OE
1
A
0
A
1
B B
3
B
2
GND GND A
2
A
3
C B
5
B
4
V
CC1
V
CC1
A
4
A
5
D B
7
B
6
GND GND A
6
A
7
E B
9
B
8
GND GND A
8
A
9
F B
11
B
10
V
CC1
V
CC1
A
10
A
11
G B
13
B
12
GND GND A
12
A
13
H B
14
B
15
T/R
2
OE
2
A
15
A
14
J B
17
B
16
T/R
3
OE
3
A
16
A
17
K B
19
B
18
GND GND A
18
A
19
L B
21
B
20
V
CC2
V
CC2
A
20
A
21
M B
23
B
22
GND GND A
22
A
23
N B
25
B
24
GND GND A
24
A
25
P B
27
B
26
V
CC2
V
CC2
A
26
A
27
R B
29
B
28
GND GND A
28
A
29
T B
30
B
31
T/R
4
OE
4
A
31
A
30
Inputs
Outputs
Inputs
Outputs
OE
1
T/R
1
OE
3
T/R
3
L L Bus B
0
–B
7
Data to Bus A
0
–A
7
L L Bus B
16
–B
23
Data to Bus A
16
–A
23
L H Bus A
0
–A
7
Data to Bus B
0
–B
7
L H Bus A
16
–A
23
Data to Bus B
16
–B
23
HXHIGH–Z State on A
0
–A
7
,B
0
–B
7
H X HIGH–Z State on A
16
–A
23
,B
16
–B
23
Inputs
Outputs
Inputs
Outputs
OE
2
T/R
2
OE
4
T/R
4
L L Bus B
8
–B
15
Data to Bus A
8
–A
15
L L Bus B
24
–B
31
Data to Bus A
24
–A
31
L H Bus A
8
–A
15
Data to Bus B
8
–B
15
L H Bus B
24
–A
31
Data to Bus B
24
–B
31
H X HIGH–Z State on A
8
–A
15
,B
8
–B
15
H X HIGH–Z State on A
24
–A
31
,B
24
–B
31
3 www.fairchildsemi.com
74LVT32245 • 74LVTH32245
Functional Description
The LVT32245 and LVTH32245 contain thirty-two non-inverting bidirectional buffers with 3-STATE outputs. The device is
byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together
to obtain 16-bit or full 32-bit operation.
Logic Diagrams
Byte 1
Byte 2
Byte 3
Byte 4
V
CC1
is associated with Bytes 1 and 2.
V
CC2
is associated with Bytes 3 and 4.
Note: Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
P1-P3P4-P6

74LVTH32245GX

Mfr. #:
Buy 74LVTH32245GX
Manufacturer:
ON Semiconductor / Fairchild
Description:
Bus Transceivers Transceiver LV 32Bit
Lifecycle:
New from this manufacturer.
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