XLH726135.000000X

FXO-HC72 Series
Page 4 of 14
© 2008 FOX ELECTRONICS | ISO9001:2000 Certified
Jitter is frequency dependent. Below are typical values at select frequencies.
Phase Jitter is integrated from HP3048 Phase Noise Measurement System; measured directly into 50 ohm input; V
DD
=2.5V.
TIE
was measured on LeCroy LC684 Digital Storage Scope, directly into 50 ohm input, with Amherst M1 software; V
DD
= 2.5V.
Per MJSQ spec (Methodologies for Jitter and Signal Quality specifications)
Rj and Dj, measured on LeCroy LC684 Digital Storage Scope, directly into 50 ohm input, with Amherst M1 software.
Per MJSQ spec (Methodologies for Jitter and Signal Quality specifications)
Phase Jitter & Time Interval Error (TIE)
Frequency
Phase Jitter
(12kHz to 20MHz)
T I E
(Sigma of Jitter Distribution)
Units
62.5 MHz 2.1 3.1 pS RMS
106.25 MHz 1.2 3.5 pS RMS
125 MHz 1.1 2.7 pS RMS
156.25 MHz
0.8
3.7
pS RMS
Random & Deterministic Jitter Composition
Frequency
Random (Rj)
(pS RMS)
Deterministic (Dj)
(pS P-P)
Total Jitter (Tj)
(14 x Rj) + Dj
62.5 MHz 1.3 8.4 27.6 pS
106.25 MHz 1.4 8.3 27.7 pS
125 MHz 1.3 6.7 25.6 pS
156.25 MHz
1.4
9.7
29.5 pS
Phase Noise
10
-160dBc
-140dBc
-150dBc
-130dBc
-120dBc
-110dBc
-90dBc
-80dBc
-100dBc
-50dBc
-70dBc
-60dBc
-20dBc
-30dBc
-40dBc
0 dBc
-10dBc
Data Collected using HP 3048A
1M100k10k100 1k
Offset Frequency (10Hz to 40MHz)
40M10M
62.5 MHz
156.25MHz
(dBc / Hz) vs. offset frequency
2.5V Phase Noise Graphs
Four Frequencies from Jitter Tables
106.25 MHz
125MHz
62.5 MHz
156.25MHz
125MHz
62.5 MHz only to 2 MHz offset Equipment Limitation
FXO-HC72 Series
Page 5 of 14
© 2008 FOX ELECTRONICS | ISO9001:2000 Certified
NOTE: XPRESSO HCMOS XOs are designed to
fit on Industry Standard, 4 pad layouts
Pin Description and Recommended Circuit
Pin #
Name
Type
Function
1
E / D
1
Logic Enable / Disable Control of Output (0 = Disabled)
2 GND Ground Electrical Ground for V
DD
3 Output Output HCMOS Oscillator Output
4
V
DD
2
Power Power Supply Source Voltage
Test
Points
N. C.
Hi Z
No Connection (Factory Use ONLY)
NOTES:
1
Includes pull-up resistor to V
DD
to provide output when the pin (1) is No Connect.
2
Installation should include a 0.01µF bypass capacitor placed between V
DD
(Pin 4) and GND (Pin 2) to minimize power supply line noise.
E / D V
DD
N. C.
N. C.
GND Output
Terminations as viewed from the Top
Enable / Disable Control
Pin # 1 (state) Output (Pin # 3)
OPEN
(No Connection)
ACTIVE Output
“1” Level V
IH
> 70% V
DD
ACTIVE Output
“0” Level V
IL
< 30% V
DD
High Impedance
2
TP
1
3
4
TP
Soldering Reflow Profile (2 times Maximum at 260°C for 10 seconds MAX)
25°C
160°C
180°C
225°C
260°C
10 Seconds Max
within 5°C of 260°C peak
Ramp Down
Not to exceed 6°C/s
Ramp-Up
3°C/s Max
p
t
120 ± 20 Seconds
In Pre-heating Area
Above 225°C Reflow Area
50±10 Seconds
400 Seconds MAX from +25°C to 260°C peak
GND
E/D
HCMOS LOAD
(15 pF)
N C
# 4
# 3# 2
# 1
OUT
0.01 F
DD
V
N C
FXO-HC72 Series
Page 6 of 14
© 2008 FOX ELECTRONICS | ISO9001:2000 Certified
Mechanical Dimensional Drawing & Pad Layout
Actual part marking
is depicted.
See Traceability (pg. 8)
for more information
Drawing is for reference to critical specifications defined by size measurements.
Certain non-critical visual attributes, such as side castellations, reference pin shape, etc. may vary
5
.
2
M
a
x
1
.
4
M
a
x
7.5 Max
Solder Pad Layout
Recommended
#1
#2
#3
#1
TP*
#3
#2
1.4
5.08
2
.
6
2
.
0
1.8
4
.
2
#4
TP*
#4
2.54
Pin 1 Designator
(FOX Head or Dot)
Note: XPRESSO HCMOS XOs are designed to fit o
n
industry standard, 4 pad, layouts.
5.08
Pin Connections
#1) E/D #3 Output
#2 GND #4 VDD
*TP are test points and are NC
Top
View
Bottom
View

XLH726135.000000X

Mfr. #:
Manufacturer:
Description:
XTAL OSC XO 135.0000MHZ HCMOS
Lifecycle:
New from this manufacturer.
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