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74AVC4T3144GU12X

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
Nexperia
74AVC4T3144
4-bit dual-supply buffer/level translator; 3-state
Table 14. Dynamic characteristics for temperature range -40 °C to +125 °C [1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 5; for wave forms see Fig. 3 and Fig. 4
V
CC(B)
1.2 V ±0.1 V 1.5 V ±0.1 V 1.8 V ±0.15 V 2.5 V ±0.2 V 3.3 V ±0.3 V
Symbol Parameter Conditions
Min Max Min Max Min Max Min Max Min Max
Unit
V
CC(A)
= 1.1 V to 1.3 V
An to YBn 2.0 12.1 1.3 9.0 1.2 8.0 1.0 6.8 0.8 6.6 nst
pd
propagation
delay
B4 to YA4 2.0 12.1 1.5 11.4 1.5 11.2 1.4 10.9 1.4 10.7 ns
OE to YBn 2.0 11.5 2.0 11.5 2.0 11.5 2.0 11.5 2.0 11.5 nst
dis
disable time
OE to YA4 2.0 12.8 2.0 9.9 1.0 9.2 0.7 8.1 1.0 9.2 ns
OE to YBn 2.0 15.6 2.0 15.6 2.0 15.6 2.0 15.6 2.0 15.6 nst
en
enable time
OE to YA4 2.0 17.3 2.0 12.7 2.0 10.9 1.0 9.0 1.0 8.6 ns
V
CC(A)
= 1.4 V to 1.6 V
An to YBn 1.5 11.4 1.0 8.2 1.0 6.9 0.5 5.6 0.5 5.0 nst
pd
propagation
delay
B4 to YA4 1.3 9.0 1.0 8.2 0.9 8.0 0.8 7.6 0.6 7.5 ns
OE to YBn 1.0 6.9 1.0 6.9 1.0 6.9 1.0 6.9 1.0 6.9 nst
dis
disable time
OE to YA4 2.0 11.8 1.5 8.7 0.9 8.3 0.4 7.2 0.4 7.1 ns
OE to YBn 1.0 8.7 1.0 8.7 1.0 8.7 1.0 8.7 1.0 8.7 nst
en
enable time
OE to YA4 2.0 16.6 1.4 9.1 1.3 8.9 1.1 7.4 1.1 6.5 ns
V
CC(A)
= 1.65 V to 1.95 V
An to YBn 1.5 11.2 0.9 8.0 0.8 6.6 0.5 5.2 0.3 4.6 nst
pd
propagation
delay
B4 to YA4 1.2 8.0 1.0 6.9 0.8 6.6 0.5 6.4 0.5 6.1 ns
OE to YBn 0.5 6.6 0.5 6.6 0.5 6.6 0.5 6.6 0.5 6.6 nst
dis
disable time
OE to YA4 2.0 11.4 1.5 8.1 0.8 8.0 0.2 6.7 0.2 6.8 ns
OE to YBn 1.0 7.8 1.0 7.8 1.0 7.8 1.0 7.8 1.0 7.8 nst
en
enable time
OE to YA4 1.5 16.0 1.2 8.3 1.2 8.0 0.8 6.3 0.6 5.8 ns
V
CC(A)
= 2.3 V to 2.7 V
An to YBn 1.4 10.9 0.8 7.6 0.5 6.4 0.4 4.9 0.2 4.3 nst
pd
propagation
delay
B4 to YA4 1.0 6.8 0.5 5.6 0.5 5.2 0.4 4.9 0.3 4.5 ns
OE to YBn 0.2 4.6 0.2 4.6 0.2 4.6 0.2 4.6 0.2 4.6 nst
dis
disable time
OE to YA4 2.0 10.7 1.5 7.8 0.7 7.3 0.2 5.8 0.2 6.6 ns
OE to YBn 0.6 5.2 0.6 5.2 0.6 5.2 0.6 5.2 0.6 5.2 nst
en
enable time
OE to YA4 1.5 15.7 1.0 7.9 1.0 6.9 0.8 5.3 0.6 4.9 ns
V
CC(A)
= 3.0 V to 3.6 V
An to YBn 1.4 10.7 0.6 7.5 0.5 6.1 0.3 4.5 0.2 4.1 nst
pd
propagation
delay
B4 to YA4 0.8 6.6 0.5 5.0 0.3 4.6 0.2 4.3 0.2 4.1 ns
OE to YBn 0.2 5.2 0.2 5.2 0.2 5.2 0.2 5.2 0.2 5.2 nst
dis
disable time
OE to YA4 2.0 10.4 1.5 7.4 0.7 7.1 0.2 5.6 0.2 6.5 ns
OE to YBn 0.5 4.6 0.5 4.6 0.5 4.6 0.5 4.6 0.5 4.6 nst
en
enable time
OE to YA4 1.5 15.5 1.0 7.8 1.0 6.8 0.7 5.1 0.5 4.6 ns
[1] t
pd
is the same as t
PLH
and t
PHL
; t
dis
is the same as t
PLZ
and t
PHZ
; t
en
is the same as t
PZL
and t
PZH
.
74AVC4T3144 All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 2 — 24 July 2018 10 / 22
Nexperia
74AVC4T3144
4-bit dual-supply buffer/level translator; 3-state
11.1. Waveforms and test circuit
aaa-027042
YBn, YA4 output
An, B4 input
t
PHL
t
PLH
V
M
V
M
V
I
GND
V
OH
V
OL
V
M
V
M
Measurement points are given in Table 15.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig. 3. The data input (An, B4) to output (YBn, YA4) propagation delay times
001aao075
outputs
disabled
outputs
enabled
outputs
enabled
V
Y
V
M
V
M
V
M
V
I
GND
V
CCO
V
OL
V
OH
OE input
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
GND
t
PZL
t
PLZ
t
PHZ
t
PZH
Measurement points are given in Table 15.
V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig. 4. Enable and disable times
Table 15. Measurement points
Supply voltage Input [1] Output [2]
V
CC(A)
, V
CC(B)
V
M
V
M
V
X
V
Y
0.8 V to 1.6 V 0.5V
CCI
0.5V
CCO
V
OL
+ 0.1 V V
OH
- 0.1 V
1.65 V to 2.7 V 0.5V
CCI
0.5V
CCO
V
OL
+ 0.15 V V
OH
- 0.15 V
3.0 V to 3.6 V 0.5V
CCI
0.5V
CCO
V
OL
+ 0.3 V V
OH
- 0.3 V
[1] V
CCI
is the supply voltage associated with the data input port.
[2] V
CCO
is the supply voltage associated with the output port.
74AVC4T3144 All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 2 — 24 July 2018 11 / 22
Nexperia
74AVC4T3144
4-bit dual-supply buffer/level translator; 3-state
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
001aae331
V
EXT
V
CC
V
I
V
O
DUT
C
L
R
T
R
L
R
L
G
Test data is given in Table 16 .
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance.
V
EXT
= External voltage for measuring switching times.
Fig. 5. Test circuit for measuring switching times
Table 16. Test data
Supply voltage Input Load V
EXT
V
CC(A)
, V
CC(B)
V
I
[1] Δt/ΔV [2] C
L
R
L
t
PLH
, t
PHL
t
PZH
, t
PHZ
t
PZL
, t
PLZ
[3]
0.8 V to 1.6 V V
CCI
≤ 1.0 ns/V 15 pF 2 kΩ open GND 2V
CCO
1.65 V to 2.7 V V
CCI
≤ 1.0 ns/V 15 pF 2 kΩ open GND 2V
CCO
3.0 V to 3.6 V V
CCI
≤ 1.0 ns/V 15 pF 2 kΩ open GND 2V
CCO
[1] V
CCI
is the supply voltage associated with the data input port.
[2] dV/dt ≥ 1.0 V/ns
[3] V
CCO
is the supply voltage associated with the output port.
74AVC4T3144 All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2018. All rights reserved
Product data sheet Rev. 2 — 24 July 2018 12 / 22
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74AVC4T3144GU12X

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Nexperia
Description:
Translation - Voltage Levels 74AVC4T3144GU12/SOT1174/XQFN12
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