GTL2002 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 8 — 19 August 2013 7 of 27
NXP Semiconductors
GTL2002
2-bit bidirectional low voltage translator
8.4 Sizing pull-up resistor
The pull-up resistor value needs to limit the current through the pass transistor when it is
in the ON state to about 15 mA. This will guarantee a pass voltage of 260 mV to 350 mV.
If the current through the pass transistor is higher than 15 mA, the pass voltage will also
be higher in the ON state. To set the current through each pass transistor at 15 mA, the
pull-up resistor value is calculated as shown in Equation 1
:
(1)
Table 6
summarizes resistor values for various reference voltages and currents at 15 mA
and also at 10 mA and 3 mA. The resistor value shown in the +10 % column or a larger
value should be used to ensure that the pass voltage of the transistor would be 350 mV or
less. The external driver must be able to sink the total current from the resistors on both
sides of the GTL-TVC device at 0.175 V, although the 15 mA only applies to current
flowing through the GTL-TVC device. See application note AN10145, “Bidirectional low
voltage translators” for more information.
[1] Calculated for V
OL
=0.35V.
[2] Assumes output driver V
OL
= 0.175 V at stated current.
[3] + 10 % to compensate for V
DD
range and resistor tolerance.
Table 6. Pull-up resistor values
Pull-up resistor value ()
[1]
Voltage 15 mA
[2]
10 mA
[2]
3mA
[2]
Nominal +10%
[3]
Nominal +10%
[3]
Nominal +10%
[3]
5.0 V 310 341 465 512 1550 1705
3.3 V 197 217 295 325 983 1082
2.5 V 143 158 215 237 717 788
1.8 V 97 106 145 160 483 532
1.5 V 77 85 115 127 383 422
1.2 V 57 63 85 94 283 312
GTL2002 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 8 — 19 August 2013 8 of 27
NXP Semiconductors
GTL2002
2-bit bidirectional low voltage translator
9. Limiting values
[1] The performance capability of a high-performance integrated circuit in conjunction with its thermal
environment can create junction temperature which are detrimental to reliability. The maximum junction
temperature of this integrated circuit should not exceed 150 C.
[2] The input and output negative voltage ratings may be exceeded if the input and output clamp current
ratings are observed.
10. Recommended operating conditions
[1] V
SREF
V
DREF
1.5 V for best results in level shifting applications.
Table 7. Limiting values
[1]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
SREF
voltage on pin SREF
[2]
0.5 +7.0 V
V
DREF
voltage on pin DREF
[2]
0.5 +7.0 V
V
GREF
voltage on pin GREF
[2]
0.5 +7.0 V
V
Sn
voltage on port Sn
[2]
0.5 +7.0 V
V
Dn
voltage on port Dn
[2]
0.5 +7.0 V
I
REFK
diode current on reference pins V
I
<0V - 50 mA
I
SK
diode current port Sn V
I
<0V - 50 mA
I
DK
diode current port Dn V
I
<0V - 50 mA
I
max
clamp current per channel channel in ON state - 128 mA
T
stg
storage temperature 65 +150 C
Table 8. Recommended operating conditions
Symbol Parameter Conditions Min Max Unit
V
I/O
voltage on an input/output pin Sn, Dn 0 5.5 V
V
SREF
voltage on pin SREF
[1]
05.5V
V
DREF
voltage on pin DREF 0 5.5 V
V
GREF
voltage on pin GREF 0 5.5 V
I
PASS
pass transistor current - 64 mA
T
amb
ambient temperature operating in free air 40 +85 C
GTL2002 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 8 — 19 August 2013 9 of 27
NXP Semiconductors
GTL2002
2-bit bidirectional low voltage translator
11. Static characteristics
[1] All typical values are measured at T
amb
=25C.
[2] C
io(on)
maximum of 30 pF and C
io(off)
maximum of 15 pF is guaranteed by design.
[3] Measured by the voltage drop between the Sn and the Dn terminals at the indicated current through the switch. ON-state resistance is
determined by the lowest voltage of the two (Sn or Dn) terminals.
Table 9. Static characteristics
T
amb
=
40
C to +85
C, unless otherwise specified.
Symbol Parameter Conditions Min Typ
[1]
Max Unit
V
OL
LOW-level output voltage V
DD
= 3.0 V; V
SREF
= 1.365 V;
V
Sn
or V
Dn
= 0.175 V;
I
clamp
= 15.2 mA
- 260 350 mV
V
IK
input clamping voltage I
I
= 18 mA; V
GREF
=0V - - 1.2 V
I
LI(gate)
gate input leakage current V
I
=5V; V
GREF
=0V --5A
C
ig
input capacitance at gate pin GREF; V
I
= 3 V or 0 V - 19.4 - pF
C
io(off)
off-state input/output capacitance V
O
= 3 V or 0 V; V
GREF
=0V
[2]
-7.4-pF
C
io(on)
on-state input/output capacitance V
O
= 3 V or 0 V; V
GREF
=3V
[2]
-18.6-pF
R
on
ON-state resistance V
I
=0V; I
O
=64mA
[3]
V
GREF
=4.5V - 3.5 5
V
GREF
=3V - 4.4 7
V
GREF
=2.3V - 5.5 9
V
GREF
=1.5V - 67 105
V
I
=0V; I
O
=30mA;
V
GREF
=1.5V
[3]
-915
V
I
=2.4V; I
O
=15mA;
V
GREF
=4.5V
[3]
-710
V
I
=2.4V; I
O
=15mA;
V
GREF
=3V
[3]
-5880
V
I
=1.7V; I
O
=15mA;
V
GREF
=2.3V
[3]
-5070

GTL2002DC,125

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Translation - Voltage Levels XLATR 2BIT BI-DIREC OD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union