AD8611/AD8612 Data Sheet
Rev. B | Page 10 of 20
APPLICATIONS INFORMATION
OPTIMIZING HIGH SPEED PERFORMANCE
As with any high speed comparator or amplifier, proper design
and layout of the AD8611/AD8612 must ensure optimal
performance. Excess stray capacitance or improper grounding
can limit the maximum performance of high speed circuitry.
Minimizing resistance from the source to the comparator input
is necessary to minimize the propagation delay of the circuit.
Source resistance in combination with the equivalent input
capacitance of the AD8611/AD8612 creates an R-C filter that
could cause a lagged voltage rise at the input to the comparator.
The input capacitance of the AD8611/AD8612 in combination
with stray capacitance from an input pin to ground results in
several picofarads of equivalent capacitance. Using a surface-mount
package and a minimum of input trace length, this capacitance
is typically around 3 pF to 5 pF. A combination of 3 kΩ source
resistance and 3 pF of input capacitance yields a time constant
of 9 ns, which is slower than the 4 ns propagation delay of the
AD8611/AD8612. Source impedances must be less than 1 kΩ
for best performance.
Another important consideration is the proper use of power-
supply-bypass capacitors around the comparator. A 1 μF bypass
capacitor must be placed within 0.5 inches of the device between
each power supply pin and ground. Another 10 nF ceramic
capacitor must be placed as close as possible to the device in
parallel with the 1 μF bypass capacitor. The 1 μF capacitor reduces
any potential voltage ripples from the power supply, and the 10 nF
capacitor acts as a charge reservoir for the comparator during
high frequency switching.
A continuous ground plane on the PC board is also recommended
to maximize circuit performance. A ground plane can be created
by using a continuous conductive plane over the surface of the
circuit board, only allowing breaks in the plane for necessary
traces and vias. The ground plane provides a low inductive current
return path for the power supply, thus eliminating any potential
differences at various ground points throughout the circuit board
caused from ground bounce. A proper ground plane can also
minimize the effects of stray capacitance on the circuit board.
UPGRADING THE LT1394 AND LT1016
The AD8611 single comparator is pin-for-pin compatible with
the LT1394 and LT1016 and offers an improvement in propagation
delay over both comparators. These devices can easily be replaced
with the higher performance AD8611; however, there are differ-
ences, so it is useful to ensure that the system still operates properly.
The five major differences between the AD8611 and the LT1016
include input voltage range, input bias currents, propagation delay,
output voltage swing, and power consumption. Input common-
mode voltage is found by taking the average of the two voltages
at the inputs to the comparator.
The LT1016 has an input voltage range from 1.25 V above the
negative supply to 1.5 V below the positive supply. The AD8611
input voltage range extends down to the negative supply voltage
to within 2 V of V+. If the input common-mode voltage is
exceeded, input signals must be shifted or attenuated to bring
them into range, keeping in mind the note about source resistance
in the Optimizing High Speed Performance section.
For example, an AD8611 powered from a 5 V single supply has
its noninverting input connected to a 1 V peak-to-peak, high
frequency signal centered around 2.3 V and its inverting input
connected to a fixed 2.5 V reference voltage. The worst-case
input common-mode voltage to the AD8611 is 2.65 V. This is
well below the 3.0 V input common-mode voltage range to the
comparator. Note that signals much greater than 3.0 V result in
increased input currents and can cause the comparator to
operate more slowly.
The input bias current to the AD8611 is 7 μA maximum over
temperature (−40°C to +85°C). This is identical to the maximum
input bias current for the LT1394, and half of the maximum I
B
for the LT1016. Input bias currents to the AD8611 and LT1394
flow out from the comparator inputs, as opposed to the LT1016
whose input bias current flows into its inputs. Using low value
resistors around the comparator and low impedance sources
will minimize any potential voltage shifts due to bias currents.
The AD8611 is able to swing within 200 mV of ground and
within 1.5 V of positive supply voltage. This is slightly more
output voltage swing than the LT1016. The AD8611 also uses
less current than the LT10165 mA as compared to 25 mA of
typical supply current.
The AD8611 has a typical propagation delay of 4 ns, compared
with the LT1394 and LT1016, whose propagation delays are
typically 7 ns and 10 ns, respectively.
MAXIMUM INPUT FREQUENCY AND OVERDRIVE
The AD8611 can accurately compare input signals up to 100 MHz
with less than 10 mV of overdrive. The level of overdrive required
increases with ambient temperature, with up to 50 mV of
overdrive recommended for a 100 MHz input signal and an
ambient temperature of +85°C.
It is not recommend to use an input signal with a fundamental
frequency above 100 MHz because the AD8611 could draw up
to 20 mA of supply current and the outputs may not settle to a
definite state. The device returns to its specified performance
once the fundamental input frequency returns to below 100 MHz.
OUTPUT LOADING CONSIDERATIONS
The AD8611 can deliver up to 10 mA of output current without
increasing its propagation delay. The outputs of the device must
not be connected to more than 40 TTL input logic gates or drive
less than 400 Ω of load resistance.
Data Sheet AD8611/AD8612
Rev. B | Page 11 of 20
The AD8611 output has a typical output swing between ground
and 1 V below the positive supply voltage. Decreasing the output
load resistance to ground lowers the maximum output voltage
due to the increase in output current. Table 6 shows the typical
output high voltage vs. load resistance to ground.
Table 6. Maximum Output Voltage vs. Resistive Load
Output Load to Ground V+ − V
OU T, H I
(typ)
300 Ω
1.5 V
500 Ω 1.3 V
1 kΩ 1.2 V
10 kΩ 1.1 V
>20 kΩ 1.0 V
Connecting a 500 Ω to 2 kΩ pull-up resistor to V+ on the
output helps increase the output voltage so that it is closer to the
positive rail; in this configuration, however, the output voltage
will not reach its maximum until 20 ns to 50 ns after the output
voltage switches. This is due to the R-C time constant between
the pull-up resistor and the output and load capacitances. The
output pull-up resistor cannot improve propagation delay.
The AD8611 is stable with all values of capacitive load; however,
loading an output with greater than 30 pF increases the
propagation delay of that channel. Capacitive loads greater than
500 pF also create some ringing on the output wave. Table 7 shows
propagation delay vs. several values of load capacitance. The
loading on one output of the AD8611 does not affect the
propagation delay of the other output.
Table 7. Propagation Delay vs. Capacitive Load
C
L
(pF) t
PD
Rising (ns) t
PD
Falling (ns)
<10 3.5 3.5
33 5 5
100 8 7
390 14.5 10
680 26 15
USING THE LATCH
TO MAINTAIN A CONSTANT OUTPUT
With the V
CC
supply at a nominal 5 V, the latch input to the
AD8611/AD8612 can retain data at the output of the comparator.
When the latch voltage goes high, the output voltage remains in
its previous state, independent of changes in the input voltage.
The setup time for the AD8611/AD8612 is 0.5 ns and the hold
time is 0.5 ns. Setup time is defined as the minimum amount of
time the input voltage must remain in a valid state before the
latch is activated for the latch to function properly. Hold time is
defined as the amount of time the input must remain constant
after the latch voltage goes high for the output to remain latched
to its voltage.
The latch input is TTL and CMOS compatible, so a logic high is
a minimum of 2.0 V and a logic low is a maximum of 0.8 V. The
latch circuitry in the AD8611/AD8612 has no built-in
hysteresis.
At or below approximately 4.1 V, the latch pin becomes
unresponsive and must normally be tied low for low V
CC
operation.
INPUT STAGE AND BIAS CURRENTS
The AD8611 and AD8612 each use a bipolar PNP differential input
stage. This enables the input common-mode voltage range to
extend from within 2.0 V of the positive supply voltage to 200 mV
below the negative supply voltage. Therefore, using a single 5 V
supply, the input common-mode voltage range is −200 mV to
+3.0 V. Input common-mode voltage is the average of the voltages
at the two inputs. For proper operation, the input common-mode
voltage must be kept within the common-mode voltage range.
The input bias current for the AD8611/AD8612 is 4 μA,
which is the amount of current that flows from each input of
the comparator. This bias current goes to zero on an input that
is high and doubles on an input that is low, which is a characteristic
common to any bipolar comparator. Care must be taken in
choosing resistances to be connected around the comparator
because large resistors could significantly decrease the voltage
due to the input bias current.
The input capacitance for the AD8611/AD8612 is typically 3 pF.
This is measured by inserting a 5 kΩ source resistance in series
with the input and measuring the change in propagation delay.
USING HYSTERESIS
Hysteresis can easily be added to a comparator through the
addition of positive feedback. Adding hysteresis to a comparator
offers an advantage in noisy environments where it is undesirable
for the output to toggle between states when the input signal is
close to the switching threshold. Figure 24 shows a simple method
for configuring the AD8611 or AD8612 with hysteresis.
V
REF
R1
SIGNAL
COMPARATOR
R2
C
F
06010-021
Figure 24. Configuring the AD8611/AD8612 with Hysteresis
In Figure 24, the input signal is connected directly to the inverting
input of the comparator. The output is fed back to the noninverting
input through R1 and R2. The ratio of R1 to R1 + R2 establishes
the width of the hysteresis window, with V
REF
setting the center
of the window, or the average switching voltage. The QA or QB
output switches low when the input voltage is greater than V
HI
,
and does not switch high again until the input voltage is less
than V
LO
, as given in Equation 1:
( )
REFREFHI
V
RR
R
VV +
+
+=
21
1
5.1V
(1)
21
2
RR
R
VV
REF
LO
+
×=
where V+ is the positive supply voltage.
AD8611/AD8612 Data Sheet
Rev. B | Page 12 of 20
The capacitor C
F
is optional and can be added to introduce a
pole into the feedback network. This has the effect of increasing
the amount of hysteresis at high frequencies, which is useful
when comparing relatively slow signals in high frequency noise
environments. At frequencies greater than f
P
, the hysteresis
window approaches V
HI
= V+ − 1.5 V and V
LO
= 0 V. For
frequencies less than f
P
, the threshold voltages remain as in
Equation 1.
CLOCK TIMING RECOVERY
Comparators are often used in digital systems to recover clock
timing signals. High speed square waves transmitted over any
distance, even tens of centimeters, can become distorted due to
stray capacitance and inductance. Poor layout or improper
termination can also cause reflections on the transmission line,
further distorting the signal waveform. A high speed comparator
can recover the distorted waveform while maintaining a
minimum of delay.
Figure 25 shows V
OUT
vs. V
IN
as the AD8611 recovers a 65 MHz,
100 mV peak-to-peak distorted clock signal into a 4 V peak-to-
peak square wave. The lower trace is the input to the AD8611,
and the upper trace is the QA or QB output from the comparator.
The AD8611 is powered from a 5 V single supply.
TIME (10ns/DIV)
2V/DIV
V
OUT
V
IN
20mV/DIV
06010-022
Figure 25. Using the AD8611 to Recover a Noisy Clock Signal
A 5 V, HIGH SPEED WINDOW COMPARATOR
A window comparator circuit detects when a signal is between
two fixed voltages. The AD8612 can create a high speed window
comparator, as shown in Figure 26. In this example, the
reference window voltages are set as:
43
4
21
2
RR
R
V
RR
R
V
LO
HI
+
=
+
=
The output of the A1 comparator goes high when the input
signal exceeds V
HI
, and the output of A2 goes high only when
V
IN
drops below V
LO
. When the input voltage is between V
HI
and V
LO
, both comparator outputs are low, turning off both Q1
and Q2, thus driving V
OUT
to a high state. If the input signal
goes outside of the reference voltage window, V
OUT
goes low.
To ensure a minimum of switching delay, the use of high speed
transistors is recommended for Q1 and Q2. Using the AD8612
with 2N3960 transistors provides a total propagation delay from
V
IN
to V
OUT
of less than 10 ns.
Table 8. Window Comparator Output States
V
OUT
Input Voltage
≈ 200 mV V
IN
< V
LO
+5 V V
LO
< V
IN
< V
HI
≈ 200 mV V
IN
> V
HI
V
HI
5V
5V
R1
R2
6
7
3
4
10
1
V
IN
AD8612
1k
V
LO
5V
R3
R4
9
8
11
5
12
14
AD8612
1k
Q1
5V
V
OUT
1k
500
Q2
500
NOTES
1. Q1, Q2 = 2N3960.
2. PINS 2 AND 13 ARE NO CONNECTS.
A1
A2
06010-023
Figure 26. A High Speed Window Comparator

AD8611ARMZ-R2

Mfr. #:
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Analog Devices Inc.
Description:
Analog Comparators 8-Lead Ultra fast 4ns SGL Supply
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