LTC4317
3
4317fa
For more information www.linear.com/LTC4317
elecTrical characTerisTics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 3.3V, unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply
V
CC
Input Supply Range
l
2.25 5.5 V
I
CC
Input Supply Current ENABLE = 3.3V, SCLIN = SDAIN = 0V
l
0.8 2 mA
ENABLE = 0V, SCLIN = SDAIN = 0V
l
350 800 µA
V
CC(UVLO)
V
CC
Supply Undervoltage Lockout V
CC
Rising
l
1.9 2.1 2.2 V
V
CC(HYST)
V
CC
Supply Undervoltage Lockout Hysteresis 100 mV
ENABLE and READY
V
ENABLE(TH)
ENABLE Threshold Voltage Enable Rising
l
1 1.4 1.8 V
V
ENABLE(HYST)
ENABLE Hysteresis 50 mV
I
ENABLE(LEAK)
ENABLE Input Current
l
±1 µA
V
READY(OL)
READY Output Low Voltage I = 3mA
l
0.4 V
I
READY(OH)
READY Off Leakage Current V
CC
= V
READY
= 5.5V
l
±5 µA
SCLIN, SDAIN, SCLOUT, SDAOUT
V
SCL,SDA(TH)
Threshold Voltage SDA, SCL Pins Rising
l
1.5 1.8 2.0 V
V
SCL,SDA(HYST)
Hysteresis 50 mV
I
SCL,SDA(LEAK)
Leakage Current SDA, SCL Pins = 5.5V, 0V, V
CC
= 5.5V, 0V
l
±10 µA
I
SCL,SDA(LEAK-INOUT)
Input to Output Leakage Current SDAIN, SCLIN Pins = 5.5V, V
CC
= 5.5V,
SDAOUT, SCLOUT Pins = 4.5V
l
±10 µA
C
SCL,SDA
Pin Capacitance Note 3
l
10 pF
V
SCL,SDA(PRE)
Precharge Voltage
l
0.8 1 1.2 V
V
SDAOUT(OL)
SDAOUT Output Low Voltage I = 4mA
l
0.4 V
R
DS(ON)
Pass Switch On Resistance V
CC
= 2.25V, SCLIN = SDAIN = 0.4V
V
CC
= 3.3V, SCLIN = SDAIN = 0.4V
V
CC
= 5V, SCLIN = SDAIN = 0.4V
l
l
l
3
2.2
1.8
12
8
6
Ω
Ω
Ω
XORH, XORL
I
XORH/XORL
XORH and XORL Input Current
l
±100 nA
I
2
C Interface Timing
f
SCL(MAX)
Maximum SCLIN Clock Frequency Note 3
l
400 kHz
t
PDHL(SDAOUTn)
SDAOUT Fall Delay C = 100pF, R
PULLUP
= 10k
l
170 300 ns
t
f(SDAOUTn)
SDAOUT Fall Time C = 100pF, R
PULLUP
= 10k
l
20 60 300 ns
t
TIMEOUT
Stuck Bus Timeout SCLIN Held Low or High
l
25 30 35 ms
t
IDLE
Bus Idle Time
l
80 120 160 µs
t
GLITCH
SCLIN and SDAIN Glitch Filter
l
50 100 ns
Note 2: All currents into pins are positive and all voltages are referenced to
GND unless otherwise indicated.
Note 3: Guaranteed by design and not tested.
