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AD5300BRMZ-REEL

P1-P3P4-P6P7-P9P10-P12
REV. C
a
AD5300
*
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
2.7 V to 5.5 V, 140 ␮A, Rail-to-Rail Output
8-Bit DAC in a SOT-23
FUNCTIONAL BLOCK DIAGRAM
POWER-ON
RESET
DAC
REGISTER
INPUT
CONTROL
LOGIC
AD5300
V
DD
GND
V
OUT
SYNC
SCLK
DIN
8-BIT
DAC
REF (+) REF (–)
OUTPUT
BUFFER
POWER-DOWN
CONTROL LOGIC
RESISTOR
NETWORK
FEATURES
Single 8-Bit DAC
6-Lead SOT-23 and 8-Lead MSOP Packages
Micropower Operation: 140 ␮A @ 5 V
Power-Down to 200 nA @ 5 V, 50 nA @ 3 V
2.7 V to 5.5 V Power Supply
Guaranteed Monotonic by Design
Reference Derived from Power Supply
Power-On Reset to 0 V
3 Power-Down Functions
Low Power Serial Interface with
Schmitt-Triggered Inputs
On-Chip Output Buffer Amplifier,
Rail-to-Rail Operation
SYNC Interrupt Facility
APPLICATIONS
Portable Battery-Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators
GENERAL DESCRIPTION
The AD5300 is a single, 8-bit buffered voltage output DAC that
operates from a single 2.7 V to 5.5 V supply, consuming 115 µA
at 3 V. Its on-chip precision output amplifier allows rail-to-rail
output swing to be achieved. The AD5300 uses a versatile 3-wire
serial interface that operates at clock rates up to 30 MHz and is
compatible with standard SPI
®
, QSPI™, MICROWIRE
™
, and
DSP interface standards.
The reference for AD5300 is derived from the power supply
inputs and thus gives the widest dynamic output range. The part
incorporates a power-on reset circuit that ensures that the DAC
output powers up to 0 V and remains there until a valid write takes
place to the device. The part contains a power-down feature that
reduces the current consumption of the device to 200 nA at 5 V
and provides software selectable output loads while in power-
down mode. The part is put into power-down mode over the
serial interface.
The low power consumption of this part in normal operation
makes it ideally suited to portable battery-operated equipment.
The power consumption is 0.7 mW at 5 V, reducing to 1 µW in
power-down mode.
The AD5300 is one of a family of pin compatible DACs. The
AD5310 is the 10-bit version and the AD5320 is the 12-bit
version. The AD5300/AD5310/AD5320 are available in 6-lead
SOT-23 packages and 8-lead MSOP packages.
PRODUCT HIGHLIGHTS
1. Available in 6-lead SOT-23 and 8-lead MSOP packages.
2. Low power, single-supply operation. This part operates from
a single 2.7 V to 5.5 V supply and typically consumes 0.35 mW
at 3 V and 0.7 mW at 5 V, making it ideal for battery-
powered applications.
3. The on-chip output buffer amplifier allows the output of the
DAC to swing rail-to-rail with a slew rate of 1 V/µs.
4. Reference derived from the power supply.
5. High speed serial interface with clock speeds up to 30 MHz.
Designed for very low power consumption. The interface
powers up only during a write cycle.
6. Power-down capability. When powered down, the DAC
typically consumes 50 nA at 3 V and 200 nA at 5 V.
*Patent pending; protected by U.S. Patent No. 5684481.
–2–
REV. C
AD5300–SPECIFICATIONS
(V
DD
= 2.7 V to 5.5 V; R
L
= 2 k⍀ to GND; C
L
= 500 pF to GND; all specifications
T
MIN
to T
MAX
, unless otherwise noted.)
B Version
1
Parameter Min Typ Max Unit Conditions/Comments
STATIC PERFORMANCE
2
Resolution 8 Bits
Relative Accuracy ±1 LSB See Figure 2.
Differential Nonlinearity ±0.25 LSB Guaranteed Monotonic by Design. See Figure 3.
Zero-Code Error +0.5 +3.5 LSB All Zeros Loaded to DAC Register. See Figure 6.
Full-Scale Error –0.5 –3.5 LSB All Ones Loaded to DAC Register. See Figure 6.
Gain Error ±1.25 % of FSR
Zero-Code Error Drift –20 µV/°C
Gain Temperature Coefficient –5 ppm of FSR/°C
OUTPUT CHARACTERISTICS
3
Output Voltage Range 0 V
DD
V
Output Voltage Settling Time 4 6 µs 1/4 Scale to 3/4 Scale Change (40 Hex to C0 Hex).
R
L
= 2 kΩ; 0 pF < C
L
< 500 pF. See Figure 16.
Slew Rate 1 V/µs
Capacitive Load Stability 470 pF R
L
=
∞
.
1000 pF R
L
= 2 kΩ.
Digital-to-Analog Glitch Impulse 20 nV-s 1 LSB Change Around Major Carry. See Figure 19.
Digital Feedthrough 0.5 nV-s
DC Output Impedance 1 Ω
Short-Circuit Current 50 mA V
DD
= 5 V.
20 mA V
DD
= 3 V.
Power-Up Time 2.5 µs Coming Out of Power-Down Mode. V
DD
= 5 V.
5 µs Coming Out of Power-Down Mode. V
DD
= 3 V.
LOGIC INPUTS
3
Input Current ±1 µA
V
INL
, Input Low Voltage 0.8 V V
DD
= 5 V.
V
INL
, Input Low Voltage 0.6 V V
DD
= 3 V.
V
INH
, Input High Voltage 2.4 V V
DD
= 5 V.
V
INH
, Input High Voltage 2.1 V V
DD
= 3 V.
Pin Capacitance 3 pF
POWER REQUIREMENTS
V
DD
2.7 5.5 V
I
DD
(Normal Mode) DAC Active and Excluding Load Current.
V
DD
= 4.5 V to 5.5 V 140 250 µAV
IH
= V
DD
and V
IL
= GND.
V
DD
= 2.7 V to 3.6 V 115 200 µAV
IH
= V
DD
and V
IL
= GND.
I
DD
(All Power-Down Modes)
V
DD
= 4.5 V to 5.5 V 0.2 1 µAV
IH
= V
DD
and V
IL
= GND.
V
DD
= 2.7 V to 3.6 V 0.05 1 µAV
IH
= V
DD
and V
IL
= GND.
POWER EFFICIENCY
I
OUT
/I
DD
93 % I
LOAD
= 2 mA. V
DD
= 5 V.
NOTES
1
Temperature range as follows: B Version: –40°C to +105°C.
2
Linearity
calculated using a reduced code range of 4 to 251. Output unloaded.
3
Guaranteed by design and characterization, not production tested.
Specifications subject to change without notice.
AD5300
–3–
REV. C
TIMING CHARACTERISTICS
1, 2
Limit at T
MIN
, T
MAX
Parameter V
DD
= 2.7 V to 3.6 V V
DD
= 3.6 V to 5.5 V Unit Conditions/Comments
t
1
3
50 33 ns min SCLK Cycle Time
t
2
13 13 ns min SCLK High Time
t
3
22.5 13 ns min SCLK Low Time
t
4
13 13 ns min SYNC to SCLK Falling Edge Setup Time
t
5
55ns min Data Setup Time
t
6
4.5 4.5 ns min Data Hold Time
t
7
00ns min SCLK Falling Edge to SYNC Rising Edge
t
8
50 33 ns min Minimum SYNC High Time
NOTES
1
All input signals are specified with tr = tf = 5 ns (10% to 90% of V
DD
) and timed from a voltage level of (V
IL
+ V
IH
)/2.
2
See Figure 1.
3
Maximum SCLK frequency is 30 MHz at V
DD
= 3.6 V to 5.5 V and 20 MHz at V
DD
= 2.7 V to 3.6 V.
Specifications subject to change without notice.
SCLK
SYNC
DIN
t
8
DB15
DB0
t
4
t
3
t
2
t
7
t
5
t
6
t
1
Figure 1. Serial Write Operation
(V
DD
= 2.7 V to 5.5 V; all specifications T
MIN
to T
MAX
, unless otherwise noted.)
ABSOLUTE MAXIMUM RATINGS*
(T
A
= 25°C, unless otherwise noted.)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Digital Input Voltage to GND . . . . . . . –0.3 V to V
DD
+ 0.3 V
V
OUT
to GND . . . . . . . . . . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . –40°C to +105°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature (T
J
max) . . . . . . . . . . . . . . . . . . . 150°C
SOT-23 Package
Power Dissipation . . . . . . . . . . . . . . . . . . . (T
J
max–T
A
)/θ
JA
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 240°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
MSOP Package
Power Dissipation . . . . . . . . . . . . . . . . . . . (T
J
max–T
A
)/θ
JA
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 206°C/W
θ
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 44°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD5300 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
Temperature Package
Model Range Branding Option
1
AD5300CHIPS DIE
AD5300BRT-500RL7 –40°C to +105°C D2B RT-6
AD5300BRT-REEL –40°C to +105°C D2B RT-6
AD5300BRT-REEL7 –40°C to +105°C D2B RT-6
AD5300BRTZ-500RL7
2
–40°C to +105°C D2B RT-6
AD5300BRTZ-REEL
2
–40°C to +105°C D2B RT-6
AD5300BRTZ-REEL7
2
–40°C to +105°C D2B RT-6
AD5300BRM –40°C to +105°C D2B RM-8
AD5300BRM-REEL –40°C to +105°C D2B RM-8
AD5300BRM-REEL7 –40°C to +105°C D2B RM-8
NOTES
1
RT = SOT-23; RM = MSOP.
2
Z = Pb-free part.
P1-P3P4-P6P7-P9P10-P12

AD5300BRMZ-REEL

Mfr. #:
Buy AD5300BRMZ-REEL
Manufacturer:
Analog Devices Inc.
Description:
IC DAC 8BIT R-R 2.7-5.5V 8MSOP
Lifecycle:
New from this manufacturer.
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