74VHC_VHCT541_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 4 June 2013 9 of 17
NXP Semiconductors 74VHC541-Q100; 74VHCT541-Q100
Octal buffer/line driver; 3-state
11. Waveforms
Measurement points are given in Table 8.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 5. Propagation delay input (An) to output (Yn)
mna901
An input
Yn output
t
PHL
t
PLH
GND
V
I
V
M
V
M
V
OH
V
OL
Measurement points are given in Table 8.
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 6. Enable and disable times
mna902
t
PLZ
t
PHZ
outputs
disabled
outputs
enabled
V
Y
V
X
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
OEn input
V
OL
V
OH
V
CC
V
I
V
M
GND
GND
t
PZL
t
PZH
V
M
V
M
Table 8. Measurement points
Type Input Output
V
M
V
M
V
X
V
Y
74VHC541-Q100 0.5V
CC
0.5V
CC
V
OL
+ 0.3 V V
OH
0.3 V
74VHCT541-Q100 1.5 V 0.5V
CC
V
OL
+ 0.3 V V
OH
0.3 V
74VHC_VHCT541_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 4 June 2013 10 of 17
NXP Semiconductors 74VHC541-Q100; 74VHCT541-Q100
Octal buffer/line driver; 3-state
Test data is given in Table 9.
Definitions test circuit:
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator
C
L
= Load capacitance including jig and probe capacitance
R
L
= Load resistor
S1 = Test selection switch
Fig 7. Load circuitry for switching times
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
001aad983
DUT
V
CC
V
CC
V
I
V
O
R
T
R
L
S1
C
L
open
G
Table 9. Test data
Type Input Load S1 position
V
I
t
r
, t
f
C
L
R
L
t
PHL
, t
PLH
t
PZH
, t
PHZ
t
PZL
, t
PLZ
74VHC541-Q100 V
CC
3.0 ns 15 pF, 50 pF 1 k open GND V
CC
74VHCT541-Q100 3.0 V 3.0 ns 15 pF, 50 pF 1 k open GND V
CC
74VHC_VHCT541_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 4 June 2013 11 of 17
NXP Semiconductors 74VHC541-Q100; 74VHCT541-Q100
Octal buffer/line driver; 3-state
12. Package outline
Fig 8. Package outline SOT163-1 (SO20)
UNIT
A
max.
A
1
A
2
A
3
b
p
cD
(1)
E
(1) (1)
eH
E
LL
p
Q
Z
ywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.1
1.0
0.9
0.4
8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT163-1
10
20
w M
b
p
detail X
Z
e
11
1
D
y
0.25
075E04 MS-013
pin 1 index
0.1
0.012
0.004
0.096
0.089
0.019
0.014
0.013
0.009
0.51
0.49
0.30
0.29
0.05
1.4
0.055
0.419
0.394
0.043
0.039
0.035
0.016
0.01
0.25
0.01
0.004
0.043
0.016
0.01
0 5 10 mm
scale
X
θ
A
A
1
A
2
H
E
L
p
Q
E
c
L
v M
A
(A )
3
A
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
99-12-27
03-02-19

74VHCT541BQ-Q100X

Mfr. #:
Manufacturer:
Nexperia
Description:
Buffers & Line Drivers Octal buffer/line driver
Lifecycle:
New from this manufacturer.
Delivery:
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