LTC3523/LTC3523-2
7
3523fb
BLOCK DIAGRAM
16
SHDN1
V
IN
1.8V TO 5.5V
2
+
PWM
LOGIC
AND
DRIVERS
SHUTDOWN
AND
V
BIAS
ANTI-RING
L1
4.7μH
V
IN1
3
PGOOD1
15
10
V
BAT
9
V
IN2
SW1
V
OUT
C
IN
47μF
C
C2
C
OUT
10μF
V
OUT
STEP-UP
1.8V TO 5.25V
V
OUT
STEP-DOWN
0.615V TO 5.5V
1.2V
R1
R2
C
OUT
10μF
R4
R3
MODE
g
m
ERROR
AMPLIFIER
ZERO CURRENT
COMP
C
C1
R
Z
C
C1
GND3
R
Z
5
4
FB1
STEP-UP
STEP-DOWN
SHARED
MODE
1
SW2
0.66V
GND2
L2
4.7μH
8
FB2
3523 BD
BULK CONTROL
SIGNALS
CURRENT
SENSE
I
ZERO
COMP
SHDN
MODE
OSC
SLP
+
+
PWM/I
LIM
COMP
PWM/I
LIM
COMP
I
LIM
REF
SLOPE COMPENSATION
PWM
LOGIC
AND
DRIVERS
V
OUT
LIMIT
COMP
MODE
OSC
I
LIM
REF
0A
SHUTDOWN
AND
V
BIAS
SHDN
+
+
––
++
SLP
+
1.2V
–9%
FB1
OSC
0.6V
1.2V
1V
SLP
+
+
+
MODE
MODE
START-UP
SOFT-START
AND
THERM REG
g
m
ERROR
AMPLIFIER
MODE
START-UP
SOFT-START
AND
THERM REG
OSCILLATOR REFERENCE
THERMAL SHDN
11
PGOOD2
13
14
SHDN2
0.6V
–9%
FB2
+
SLOPE COMPENSATION
+
+
0.6V
12
GND2
7
GND1
6
LTC3523/LTC3523-2
8
3523fb
OPERATION
The LTC3523 and LTC3523-2 are synchronous step-up and
step-down converters housed in a 16-pin QFN package.
Operating from inputs down to 1.8V, the devices feature
xed frequency, current mode PWM control for exceptional
line and load regulation and transient response. With
low R
DS(ON)
and internal MOSFET switches, the devices
maintain high effi ciency over a wide range of load cur-
rent. Operation can be best understood by referring to
the Block Diagram.
Soft-Start
Both the step-up and step-down converters on the LTC3523
/LTC3523-2 provide soft-start. The soft-start time is typi-
cally 500μs. The soft-start function resets in the event of
a commanded shutdown or thermal shutdown.
Oscillator
The frequency of operation is set by an internal oscilla-
tor to a nominal 1.2MHz for the LTC3523 and nominal
2.4MHz for the LTC3523-2. The oscillator is shared by
both converters.
Shutdown
The step-up and the step-down converters have inde-
pendent shutdown pins. To shut down a converter, pull
SHDNx below 0.35V. To enable a converter, pull SHDNx
above 1.0V.
Error Amplifi ers
Power converter control loop compensation is provided
internally for each converter. The noninverting input is
internally connected to the 1.2V reference for the step-up
and 0.6V for the step-down. The inverting input is connected
to the respective FBx for both converters. Internal clamps
limit the minimum and maximum error amp output voltage
for improved large signal transient response. A voltage
divider from V
OUT
to ground programs the output voltage
via the respective FBx pins from 1.8V to 5.25V for the step-
up and 0.615V to 5.5V for the step-down. From the Block
Diagram the design equation for programming the output
voltages is V
OUT
= 1.2V • [1 + (R1/R2)] for the step-up and
V
OUT
= 0.6V • [1 + (R3/R4)] for the step-down.
PWM Comparators
The PWM comparators are used to compare the converters
external inductor current to the current commanded by
the error amplifi ers. When the inductor current reaches
the current commanded by the error amplifi er the induc-
tor charging cycle is terminated and the rectifi cation cycle
commences.
Current Limit
The current limit comparator shuts off the N-channel switch
for the step-up and P-channel switch for the step-down
once its current limit threshold is reached. The current
limit comparator delay to output is typically 40ns. Peak
switch current is limited to approximately 1000mA for
the step-up and 650mA for the step-down independent
of input or output voltage.
Zero Current Comparator
The zero current comparator monitors the inductor cur-
rent to the output and shuts off the synchronous rectifi er
once this current reduces to approximately 20mA. This
prevents the inductor current from reversing in polarity
improving effi ciency at light loads.
Power Good Comparator
Both converters have independent open drain power good
comparators which monitor the output voltage via their
respective FBx pins. The comparator output will allow the
PGOODx to be pulled up high when the output voltage
(V
OUT
) has exceeded 91% of it fi nal value. If the output
voltage decreases below 91%, the comparator will pull
the PGOODx pin to ground. The step-up comparator has
3.3% of hysteresis and the step-down has 6.6% relative
to FBx voltage for added noise immunity.
Step-Down Overvoltage Comparator
The step-down overvoltage comparator guards against
transient overshoots greater than 10% of the output volt-
age by turning the P-channel switch off until the transient
has subsided.
LTC3523/LTC3523-2
9
3523fb
APPLICATIONS INFORMATION
Step-Up Anti-Ringing Control
The anti-ring circuitry connects a resistor across the in-
ductor to prevent high frequency ringing on the SW1 pin
during discontinuous current mode operation. The ringing
of the resonant circuit formed by L and C
SW
(capacitance
on SW pin) is low energy, but can cause EMI radiation.
Step-Up Output Disconnect
The LTC3523/LTC3523-2 step-up is designed to provide
true output disconnect by eliminating body diode conduc-
tion of the internal P-channel MOSFET rectifi er. This allows
for V
OUT
to go to zero volts during shutdown, drawing no
current from the input source. Controlling the P-channel
OPERATION
MOSFET body diode also enables inrush current limiting
at turn-on, minimizing surge currents seen by the input
supply. Note that to obtain the advantages of output dis-
connect, an external Schottky diode cannot be connected
between SW1 and V
OUT
.
Thermal Shutdown
If the die temperature reaches 160°C, the part will go into
thermal shutdown. All switches will be turned off and
the soft-start capacitor will be discharged. The device
will be enabled again when the die temperature drops by
approximately 15°C.
PCB LAYOUT GUIDELINES
The high speed operation of the LTC3523/LTC3523-2
demands careful attention to board layout. You will not
get advertised performance with careless layout. Figure 1
shows the recommended component placement. A large
ground pin copper area will help to lower the chip tem-
perature. A multilayer board with a separate ground plane
is ideal, but not absolutely necessary.
COMPONENT SELECTION
Inductor Selection
The LTC3523/LTC3523-2 can utilize small surface mount
and chip inductors due to its fast 1.2MHz switching
frequency and for the 2.4MHz version, the values are
halved. The Inductor current ripple is typically set for
20% to 40% of the peak inductor current (I
P
). High
Figure 1. Recommended Component Placement for Double Layer Board

LTC3523EUD-2#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Sync 600mA Boost & 400mA Buck DC/DC Conv
Lifecycle:
New from this manufacturer.
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