LT6604-5
7
66045fa
FREQUENCY (Hz)
CHANNEL SEPARATION (dB)
100k 10M 100M
66045 G18
–130
–110
1M
–10
–30
–50
–70
–90
V
IN
= 2V
P-P
V
S
= 5V
R
L
= 800Ω AT
EACH OUTPUT
GAIN = 1
FREQUENCY (MHz)
0.01
NOISE DENSITY (nV/√Hz)
INTEGRATED NOISE (μV)
100
45
40
35
30
25
20
15
10
5
0
90
80
70
60
50
40
30
20
10
0
66045 G17
0.1 101
INTEGRATED NOISE, GAIN = 1X
INTEGRATED NOISE, GAIN = 4X
NOISE DENSITY, GAIN = 1X
NOISE DENSITY, GAIN = 4X
PIN FUNCTIONS
+INA, –INA (Pins 2, 4): Channel A Input Pins. Signals can
be applied to either or both input pins through identical
external resistors, R
IN
. The DC gain from the differential
inputs to the differential outputs is 806Ω/R
IN
.
V
OCMA
(Pin 6): DC Common Mode Reference Voltage
for the 2nd Filter Stage in channel A. Its value programs
the common mode voltage of the differential output of
the fi lter. Pin 6 is a high impedance input, which can be
driven from an external voltage reference, or Pin 6 can be
tied to Pin 34 on the PC board. Pin 6 should be bypassed
with a 0.01μF ceramic capacitor unless it is connected to
a ground plane.
V
–
(Pins 7, 24, 31, 32, 35): Negative Power Supply Pin.
Can be ground.
V
MIDB
(Pin 8): The V
MIDB
pin is internally biased at mid
supply, see Block Diagram. For single supply operation
the V
MIDB
pin should be bypassed with a quality 0.01μF
ceramic capacitor to V
–
. For dual supply operation, Pin 8
can be bypassed or connected to a high quality DC ground.
A ground plane should be used. A poor ground will increase
noise and distortion. Pin 8 sets the output common mode
voltage of the 1st stage of the fi lter in channel B. It has a
5.5kΩ impedance, and it can be overridden with an external
low impedance voltage source.
+INB, –INB (Pins 10, 12): Channel B Input Pins. Signals
can be applied to either or both input pins through identi-
cal external resistors, R
IN
. The DC gain from differential
inputs to the differential outputs is 806Ω/R
IN
.
V
OCMB
(Pin 14): DC Common Mode Reference Voltage
for the 2nd Filter Stage in Channel B. Its value programs
the common mode voltage of the differential output of
the fi lter. Pin 14 is a high impedance input, which can be
driven from an external voltage reference, or Pin 14 can be
tied to Pin 8 on the PC board. Pin 14 should be bypassed
with a 0.01μF ceramic or greater capacitor unless it is
connected to a ground plane.
V
+
A, V
+
B (Pins 25, 17): Positive Power Supply Pins
for Channels A and B. For a single 3.3V or 5V supply
(V
–
grounded) a quality 0.1μF ceramic bypass capacitor
is required from each positive supply pin (V
+
A, V
+
B) to
the negative supply pin (V
–
). The bypass should be as
close as possible to the IC. For dual supply applications,
bypass the negative supply pins to ground and each of the
positive supply pins (V
+
A, V
+
B) to ground with a quality
0.1μF ceramic capacitor.
+OUTB, –OUTB (Pins 19, 21): Output Pins. Pins 19 and
21 are the fi lter differential outputs for channel B. With a
typical short-circuit current limit greater than ±40mA, each
pin can drive a 100Ω and/or 50pF load to AC ground.
Channel Separation
vs Frequency (Note 9)Input Referred Noise
TYPICAL PERFORMANCE CHARACTERISTICS
