DS1337 I
2
C Serial Real-Time Clock
Figure 2. Data Transfer on I
2
C Serial Bus
Depending upon the state of the R/W bit, two types of data transfer are possible:
1) Data transfer from a master tr ansmitter to a slave receiver. The first byte transmitted by the master is the
slave address. Next follows a number of data bytes. The slave returns an acknowledge bit after each received
byte. Data is transferred with the most significant bit (MSB) first.
2) Data transfer from a slave transmitter to a master receiver. The master transmits the first byte (the slave
address). The slave then returns an acknowledge bit, followed by the slave transmitting a number of data
bytes. The master returns an acknowledge bit after all received bytes other than the last byte. At the end of the
last received byte, a “not acknowledge” is returned. The master device generates all of the serial clock pulses
and the START and STOP conditions. A transfer is ended with a STOP condition or with a repeated START
condition. Since a repeated START condition is also the beginning of the next serial transfer, the bus is not
released. Data is transferred with the most significant bit (MSB) first.
The DS1337 can operate in the following two modes:
1) Slave Receiver Mode (Write M ode): Serial data and clock are received through SDA and SCL. After each
byte is received an acknowledge bit is transmitted. START and STOP conditions are recognized as the
beginning and end of a serial transfer. Address recognition is performed by hardware after reception of the
slave address and direction bit (Figure 3
). The slave address byte is the first byte received after the master
generates the START condition. The slave address byte contains the 7-bit DS1337 address, which is 1101000,
followed by the direction bit (R/W), which, for a write, is 0. After receiving and decoding the slave address byte
the device outputs an acknowledge on the SDA line. After the DS1337 acknowledges the slave address +
write bit, the master transmits a register address to the DS1337. This sets the register pointer on the DS1337.
The master may then transmit zero or more bytes of data, with the DS1337 acknowledging each byte received.
The address pointer will increment after each data byte is transferred. The master generates a STOP condition
to terminate the data write.
2) Slave Transmitter Mode (Read Mode): The first byte is received and handled as in the slave receiver mode.
However, in this mode, the direction bit indicates that the transfer direction is reversed. Serial data is
transmitted on SDA by the DS1337 while the serial clock is input on SCL. START and STOP conditions are
recognized as the beginning and end of a serial transfer (Figure 4
and Figure 5). The slave address byte is the
first byte received after the master generates a START condition. The slave address byte contains the 7-bit
DS1337 address, which is 1101000, followed by the direction bit (R/W), which, for a read, is 1. After receiving
and decoding the slave address byte the device outputs an acknowledge on the SDA line. The DS1337 then
begins to transmit data starting with the register address pointed to by the register pointer. If the register
pointer is not written to before the initiation of a read mode the first address that is read is the last one stored in
the register pointer. The DS1337 must receive a “not acknowledge” to end a read.
DS1337 I
2
C Serial Real-Time Clock
Figure 3. Data Write—Slave Receiver Mode
...AXXXXXXXXAS 0 XXXXXXXX A XXXXXXXX A XXXXXXXX A P
S - Start
A - Acknowledge (ACK)
P - Stop
<R/W>
DATA TRANSFERRED
(X+1 BYTES + ACKNOWLEDGE)
1101000
<Slave Address>
<Word Address (n)> <Data(n)> <Data(n+1)> <Data(n+X)>
Master to slave
Slave to master
Figure 4. Data Read (from Current Pointer Location)—Slave Transmitter Mode
...AXXXXXXXXA1101000S 1 XXXXXXXX A XXXXXXXX XXXXXXXX A P
<Data(n+2)> <Data(n+X)>
A
S - Start
A - Acknowledge (ACK)
P - Stop
A - Not Acknowledge (NACK)
<RW>
DATA TRANSFERRED
(X+1 BYTES + ACKNOWLEDGE)
NOTE: LAST DATA BYTE IS FOLLOWED BY A NACK
<Slave Address> <Data(n)> <Data(n+1)>
Master to slave
Slave to master
Figure 5. Data Read (Write Pointer, Then Read)—Slave Receive and Transmit
...AXXXXXXXX XXXXXXXX A XXXXXXXX A XXXXXXXX A P
S - Start
Sr - Repeated Start
A - Acknowledge (ACK)
P - Stop
A - Not Acknowledge (NACK)
DATA TRANSFERRED
(X+1 BYTES + ACKNOWLEDGE)
NOTE: LAST DATA BYTE IS FOLLOWED BY A NACK
AXXXXXXXXA1101000S 0
<RW>
<Word Address (n)>
A1101000Sr 1
<RW>
<Slave Address>
<Data(n)> <Data(n+1)> <Data(n+2)> <Data(n+X)>
Master to slave
Slave to master
DS1337 I
2
C Serial Real-Time Clock
HANDLING, PC BOARD LAYOUT, AND ASSEMBLY
The DS1337C package contains a quartz tuning-fork crystal. Pick-and-place equipment may be used, but
precautions should be taken to ensure that excessive shocks are avoided. Ultrasonic cleaning should be avoided
to prevent damage to the crystal.
Avoid running signal traces under the package, unless a ground plane is placed between the package and the
signal line. All N.C. (no connect) pins must be connected to ground.
Moisture-sensitive packages are shipped from the factory dry-packed. Handling instructions listed on the package
label must be followed to prevent damage during reflow. Refer to the IPC/JEDEC J-STD-020 standard for
moisture-sensitive device (MSD) classifications.
PIN CONFIGURATIONS
TOP VIEW
SCL
SDA
DS1337C
SQW/
NT
GND
CHIP INFORMATION
TRANSISTOR COUNT: 10,950
PROCESS: CMOS
THERMAL INFORMATION
PACKAGE
THETA-J
A
(°C/W)
THETA-J
C
(°C/W)
8 DIP 110 40
8 SO 170 40
8 μSOP 229 39
16 SO 73 23
PACKAGE INFORMATION
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
8 PDIP P8+8 21-0043
8 SO S8+2 21-0041
8 MAX U8+1 21-0036
16 SO W16-H2 21-0042
DIP
I
NTA
V
CC
I
NTA
V
CC
X1
V
CC
X1
N.C.
DS1337
N.C.
SQ
W/
I
NTB
X2
SQW/
I
NTB
X2
DS1337
N.C.N.C.
SCL
I
NTA
SCL
N.C.
N.C.
SDA
GND
SDA
GND
N.C.N.C.
SO
,
SOP
N.C.
N.C.
SO (300 mils)

DS1337S+C01

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
IC RTC CLK/CALENDAR I2C 8-SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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