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TDA18211HD/C2,518

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66
TDA18211HD_5 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 05 — 2 June 2009 25 of 66
NXP Semiconductors
TDA18211HD
DVB-T Silicon Tuner IC
9.4.2 Flowchart TDA18211SetRf_dual
The initialization phase has to be launched before any SetRf.
MS = 1: master is selected for the channel configuration.
MS = 0: slave is selected for the channel configuration.
Table 25. TDA18211SetRf_dual
Function Description Reference
Description protocol top view for a dual-tuner application
Input RF_freq, Standard (from microcontroller), MS (from
microcontroller)
Table -
Output -
Fig 7. Flowchart TDA18211SetRf_dual
001aag937
Master and slave initialization
Call TDA18211InitCal
Set the RF tracking filters
Call TDA18211RFtrackingFiltersCorrection
Set the tuner to the wanted channel
Call TDA18211ChannelConfiguration
TMVALUE_RFCAL
TMVALUE_RFCAL
init_done
Start
TDA18211SetRf_dual
End
TDA18211SetRf_dual
init_done = 1
Standard
RF_freq
MS
RF_freq
MS
No
Yes
TDA18211HD_5 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 05 — 2 June 2009 26 of 66
NXP Semiconductors
TDA18211HD
DVB-T Silicon Tuner IC
9.4.3 Flowchart TDA18211InitCal
Table 26. TDA18211InitCal
Function Description Reference
Description systematic initialization for master and slave tuners
Input MS_init
Table -
Output TMVALUE_RFCAL, init_done
Fig 8. Flowchart TDA18211InitCal
001aag938
MS_init = 1
Master initialization
I
2
C initialization sequence
Call TDA18211FixedContentsI2Cupdate
Calibrate the RF tracking filters
Call TDA18211CalcRFFilterCurve
Back to POR
Call TDA18211MSPOR
MS_init
MS_init
init_done
TMVALUE_RFCAL
Start
TDA18211InitCal
End
TDA18211InitCal
MS_init = 0
Slave initialization
I
2
C initialization sequence
Call TDA18211FixedContentsI2Cupdate
Calibrate the RF tracking filters
Call TDA18211CalcRFFilterCurve
Back to POR
Call TDA18211MSPOR
init_done = true
MS_init
MS_init
TDA18211HD_5 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 05 — 2 June 2009 27 of 66
NXP Semiconductors
TDA18211HD
DVB-T Silicon Tuner IC
9.4.4 Flowchart TDA18211FixedContentsI2Cupdate
Table 27. TDA18211FixedContentsI2Cupdate
Function Description Reference
Description update and write the TDA18211HD registers,
sequential update of AGC1 and AGC2,
image calibration algorithm
Input MS
Table -
Output -
Fig 9. Flowchart TDA18211FixedContentsI2Cupdate
001aag939
Actions
Internal table update with
correct values
Tuner registers update
TM = 08h
PL = 80h
EP1 = C6h
EP2 = DFh
EP3 = 16h
EP4 = 60h
EP5 = 80h
CPD = 80h
CD1 = 00h
CD2 = 00h
CD3 = 00h
MPD = 00h
MD1 = 00h
MD2 = 00h
MD3 = 00h
EB1 = FCh
EB2 = 01h
EB3 = 84h
EB4 = 41h
EB5 = 01h
EB6 = 84h
EB7 = 40h
EB8 = 07h
EB9 = 00h
EB10 = 00h
EB11 = 96h
EB12 = 33h
EB13 = C1h
EB14 = 00h
EB15 = 8Fh
EB16 = 00h
EB17 = 00h
EB18 = 8Ch
EB19 = 00h
EB20 = 20h
EB21 = B3h
EB22 = 48h
EB23 = B0h
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Internal table
IRCAL low band
Initialization
EP3 = 1Fh
EP4 = 66h
EP5 = 81h
CPD = CCh
CD1 = 6Ch
CD2 = 00h
CD3 = 00h
MPD = CDh
MD1 = 77h
MD2 = 08h
MD3 = 00h
-
-
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CALPLL update EP5 = 85h
CPD = CBh
CD1 = 66h
CD2 = 70h
-
-
-
-
AGC1 gain setup EB17 = 00h
EB17 = 03h
EB17 = 43h
EB17 = 4Ch
EB17
EB17
EB17
EB17
I
2
C-bus
- TM...EB23
Tuner registers update
- EP3...MD3
MAIN PLL CP source on
EB4 = 61h EB4
Tuner registers update
- EP3...CD3
EP2
Launch detector
-
Launch optimization algorithm -
EP1
Wait 5 ms - PLL locking
MAIN PLL CP source off EB4 = 41h EB4
Wait 1 ms
Wait 5 ms - PLL locking
Wait 30 ms - optimization
Wait 5 ms - measurement
IRCAL high band
Initialization
EP5 = 83h
CPD = 98h
CD1 = 65h
CD2 = 00h
MPD = 99h
MD1 = 71h
MD2 = CDh
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CALPLL update EP5 = 87h
CD1 = 65h
CD2 = 50h
-
-
-
Tuner registers update - EP3...MD3
Tuner registers update
- EP3...CD3
EP2
Launch detector
-
Launch optimization algorithm -
EP4Back to normal mode EP4 = 64h
EP1Synchronization -
EP1
Wait 5 ms - PLL locking
Wait 5 ms - PLL locking
Wait 30 ms - optimization
Wait 5 ms - measurement
IRCAL mid band
Initialization
EP5 = 82h
CPD = A8h
CD2 = 00h
MPD = A9h
MD1 = 73h
MD2 = 1Ah
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-
CALPLL update EP5 = 86h
CPD = A8h
CD1 = 66h
CD2 = A0h
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Tuner registers update - EP3...MD3
Tuner registers update
- EP3...CD3
EP2
Launch detector
-
Launch optimization algorithm -
EP1
Wait 5 ms - PLL locking
Wait 5 ms - PLL locking
Wait 30 ms - optimization
Wait 5 ms - measurement
Start
TDA18211FixedContentsI2Cupdate
End
TDA18211FixedContentsI2Cupdate
MS
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66

TDA18211HD/C2,518

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Manufacturer:
NXP Semiconductors
Description:
IC TV SILICON TUNER 64-HLQFN
Lifecycle:
New from this manufacturer.
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