©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC299, 74ACT299 Rev. 1.4.0 9
74AC299, 74ACT299 — 8-Input Universal Shift/Storage Register with Common Parallel I/O Pins
AC Electrical Characteristics for ACT
Note
8. Voltage range 5.0 is 5.0V ± 0.5V.
AC Operating Requirements for ACT
Note
9. Voltage range 5.0 is 5.0V ± 0.5V.
Capacitance
Symbol Parameter V
CC
(V)
(8)
T
A
= +25°C,
C
L
= 50pF
T
A
= −40°C to +85°C,
C
L
= 50pF
UnitsMin. Typ. Max. Min. Max.
f
MAX
Maximum Input Frequency 5.0 120 170 110 MHz
t
PLH
Propagation Delay, CP to Q
0
or Q
7
(Shift Left or Right)
5.0 4.0 8.5 12.5 3.0 14.0 ns
t
PHL
Propagation Delay, CP to Q
0
or Q
7
(Shift Left or Right)
5.0 4.0 9.0 13.5 3.5 15.0 ns
t
PLH
Propagation Delay, CP to I/O
n
5.0 4.5 8.5 12.5 4.5 13.5 ns
t
PHL
Propagation Delay, CP to I/O
n
5.0 5.0 9.5 15.0 4.5 16.5 ns
t
PHL
Propagation Delay, MR to Q
0
or Q
7
5.0 4.0 14.0 15.0 4.0 18.0 ns
t
PHL
Propagation Delay, MR to I/O
n
5.0 4.0 13.0 14.5 3.5 17.5 ns
t
PZH
Output Enable Time, OE to I/O
n
5.0 2.5 8.0 12.0 1.5 13.0 ns
t
PZL
Output Enable Time, OE to I/O
n
5.0 2.0 8.0 12.0 1.5 13.5 ns
t
PHZ
Output Disable Time, OE to I/O
n
5.0 2.0 8.5 12.5 2.0 13.5 ns
t
PLZ
Output Disable Time, OE to I/O
n
5.0 2.5 8.0 11.5 2.0 12.5 ns
Symbol Parameter V
CC
(V)
(9)
T
A
= +25°C,
C
L
= 50pF
T
A
= −40°C to +85°C,
C
L
= 50pF
UnitsTyp. Guaranteed Minimum
t
S
Setup Time, HIGH or LOW, S
0
or S
1
to CP 5.0 2.0 5.0 5.5 ns
t
H
Hold Time, HIGH or LOW, S
0
or S
1
to CP 5.0 −2.0 1.0 1.0 ns
t
S
Setup Time, HIGH or LOW, I/O
n
to CP 5.0 1.5 4.0 4.5 ns
t
H
Hold Time, HIGH or LOW, I/O
n
to CP 5.0 −1.0 1.0 1.0 ns
t
S
Setup Time, HIGH or LOW,
DS
0
or DS
7
to CP
5.0 1.5 4.5 5.0 ns
t
H
Hold Time, HIGH or LOW,
DS
0
or DS
7
to CP
5.0 −1.0 1.0 1.0 ns
t
W
CP Pulse Width, HIGH or LOW 5.0 2.0 4.0 4.5 ns
t
W
MR Pulse Width, LOW 5.0 2.0 3.5 3.5 ns
t
REC
Recovery Time, MR to CP 5.0 0 1.5 1.5 ns
Symbol Parameter Conditions Typ. Units
C
IN
Input Capacitance V
CC
= 5.0V 4.5 pF
C
PD
Power Dissipation Capacitance V
CC
= 5.5V 170 pF
