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MC100ELT28DTR2

P1-P3P4-P6P7-P8
© Semiconductor Components Industries, LLC, 2015
August, 2015 − Rev. 11
1 Publication Order Number:
MC10ELT28/D
MC10ELT28, MC100ELT28
5 V TTL to Differential
PECL and Differential PECL
to TTL Translator
Description
The MC10ELT/100ELT28 is a differential PECL to TTL translator
and a TTL to differential PECL translator in a single package. Because
PECL (Positive ECL) levels are used, only +5 V and ground are
required. The small outline 8-lead package and the dual translation
design of the ELT28 makes it ideal for applications which are sending
and receiving signals across a backplane.
The 100 Series contains temperature compensation.
Features
• 3.5 ns Typical PECL to TTL Propagation Delay
• 1.2 ns Typical TTL to PECL Propagation Delay
• PNP TTL Inputs for Minimal Loading
• 24 mA TTL Outputs
• Flow Through Pinouts
• Operating Range V
CC
= 4.75 V to 5.25 V with GND= 0 V
• Q
TTL
Output Will Default High with Inputs Left Open or < 1.3 V
• Q
ECL
Output Will Default High with Inputs Left Open
• Internal PECL Input Pulldown Resistors
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
H = MC10
K = MC100
SOIC−8
D SUFFIX
CASE 751
MARKING DIAGRAMS*
TSSOP−8
DT SUFFIX
CASE 948R
ALYWG
G
HT28
ALYWG
G
KT28
1
8
1
8
1
8
www.onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
1
8
HLT28
ALYW
G
1
8
KLT28
ALYW
G
1
8
(Note: Microdot may be in either location)
MC10ELT28, MC100ELT28
www.onsemi.com
2
Figure 1. 8−Lead Pinout (Top View) and Logic
Diagram
1
2
3
45
6
7
8
QTTL
GND
V
CC
DECL
DTTLQECL
QECL
DECL
PECL TTL
Table 1. PIN DESCRIPTION
Pin Function
QTTL TTL Outputs
DTTL TTL Data Inputs
QECL, QECL PECL Differential Outputs
DECL, DECL PECL Differential Inputs
V
CC
Positive Supply
GND Ground
Table 2. ATTRIBUTES
Characteristics Value
ESD Protection Human Body Model > 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb−Free Pkg
SOIC−8
TSSOP−8
Level 1
Level 3
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
Transistor Count 71 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 3. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
Positive Power Supply GND = 0 V 7 V
V
IN
Input Voltage GND = 0 V V
I
V
CC
0 to 6 V
I
out
PECL Output Current Continuous
Surge
50
100
mA
mA
T
A
Operating Temperature Range −40 to +85 °C
T
stg
Storage Temperature Range −65 to +150 °C
q
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
SOIC−8
SOIC−8
190
130
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case) Standard Board SOIC−8 41 to 44 °C/W
q
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
TSSOP−8
TSSOP−8
185
140
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case) Standard Board TSSOP−8 41 to 44 ± 5% °C/W
T
sol
Wave Solder Pb−Free <2 to 3 sec @ 260°C 265 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
MC10ELT28, MC100ELT28
www.onsemi.com
3
Table 4. 10ELT SERIES PECL DC CHARACTERISTICS V
CC
= 5.0 V; GND= 0.0 V (Note 2)
Symbo
l
Characteristic
−40°C 25°C 85°C
Uni
t
Min Typ Max Min Typ Max Min Typ Max
V
OH
Output HIGH Voltage (Note 3) 3920 4010 4110 4020 4105 4190 4090 4185 4280 mV
V
OL
Output LOW Voltage (Note 3) 3050 3200 3350 3050 3210 3370 3050 3227 3405 mV
V
IH
Input HIGH Voltage (Single−Ended) 3770 4110 3870 4190 3940 4280 mV
V
IL
Input LOW Voltage (Single−Ended) 3050 3500 3050 3520 3050 3555 mV
V
IHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 4)
2.2 5.0 2.2 5.0 2.2 5.0 V
I
IH
Input HIGH Current 255 175 175
mA
I
IL
Input LOW Current 0.5 0.5 0.3
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
2. Input and output parameters vary 1:1 with V
CC
. V
CC
can vary ± 0.25 V.
3. PECL outputs are terminated through a 50 W resistor to V
CC
− 2 V.
4. V
IHCMR
min varies 1:1 with GND, V
IHCMR
max varies 1:1 with V
CC
.
Table 5. 100ELT SERIES PECL DC CHARACTERISTICS V
CC
= 5.0 V; GND= 0.0 V (Note 5)
Symbol
Characteristic
−40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
V
OH
Output HIGH Voltage (Note 6) 3915 3995 4120 3975 4045 4120 3975 4050 4120 mV
V
OL
Output LOW Voltage (Note 6) 3170 3305 3445 3190 3295 3380 3190 3295 3380 mV
V
IH
Input HIGH Voltage (Single−Ended) 3835 4120 3835 4120 3835 4120 mV
V
IL
Input LOW Voltage (Single−Ended) 3190 3525 3190 3525 3190 3525 mV
V
IHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 7)
2.2 5.0 2.2 5.0 2.2 5.0 V
I
IH
Input HIGH Current 255 175 175
mA
I
IL
Input LOW Current 0.5 0.5 0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
5. Input and output parameters vary 1:1 with V
CC
. V
CC
can vary ± 0.25 V.
6. PECL outputs are terminated through a 50 W resistor to V
CC
− 2 V.
7. V
IHCMR
min varies 1:1 with GND, V
IHCMR
max varies 1:1 with V
CC
.
Table 6. TTL OUTPUT DC CHARACTERISTICS V
CC
= 4.75V to 5.25V; T
A
= −40°C to 85°C
Symbol
Characteristic Condition Min Typ Max Unit
V
OH
Output HIGH Voltage I
OH
= −3.0 mA 2.4 V
V
OL
Output LOW Voltage I
OL
= 24 mA 0.5 V
I
CCH
Power Supply Current 27 40 mA
I
CCL
Power Supply Current 29 42 mA
I
OS
Output Short Circuit Current −150 −60 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
P1-P3P4-P6P7-P8

MC100ELT28DTR2

Mfr. #:
Buy MC100ELT28DTR2
Manufacturer:
ON Semiconductor
Description:
IC TRNSLTR UNIDIRECTIONAL 8TSSOP
Lifecycle:
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