SSM6J501NU,LF Datasheet SSM6J501NU,LF | P1-P3

SSM6J501NU

2014-03-01

1

TOSHIBA Field Effect Transistor Silicon P Channel MOS Type(U-MOSⅥ)

SSM6J501NU

Power Management Switch Applications

• 1.5V drive

• Low ON-resistance: R

DS(ON)

= 43.0 mΩ (max) (@V

GS

= -1.5 V)

R

DS(ON)

= 26.5 mΩ (max) (@V

GS

= -1.8 V)

R

DS(ON)

= 19.0 mΩ (max) (@V

GS

= -2.5 V)

R

DS(ON)

= 15.3 mΩ (max) (@V

GS

= -4.5 V)

Absolute Maximum Ratings

(Ta

=

25°C)

Characteristics Symbol Rating Unit

Drain-Source voltage V

DSS

−20 V

Gate-Source voltage V

GSS

±8 V

DC I

D

−10

Drain current

Pulse I

DP

(Note 1) −30

A

P

D

(Note 2) 1

Power dissipation

t≦10s 2

W

Channel temperature T

ch

150 °C

Storage temperature T

stg

−55 to 150 °C

Note: Using continuously under heavy loads (e.g. the application of

high temperature/current/voltage and the significant change in

temperature, etc.) may cause this product to decrease in the

reliability significantly even if the operating conditions (i.e.

operating temperature/current/voltage, etc.) are within the

absolute maximum ratings.

Please design the appropriate reliability upon reviewing the

Toshiba Semiconductor Reliability Handbook (“Handling

Precautions”/“Derating Concept and Methods”) and individual

reliability data (i.e. reliability test report and estimated failure rate, etc).

Note 1: The pulse width limited by max channel temperature.

Note 2: Mounted on an FR4 board.

(25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm

2

)

Marking(Top View) Equivalent Circuit(Top View) Pin Condition(Top View)

Unit: mm

UDFN6B

JEDEC ―

JEITA ―

TOSHIBA 2-2AA1A

Weight: 8.5 mg (typ.)

5

1

3

SP1

2

4

6

Polarity marking

Polarity marking (on the top)

*Electrodes : on the bottom

132

5

46

1

3

2

5

4

6

Drain

Source

1,2,5,6: Drain

3: Gate

4: Source

Start of commercial production

2010-11

SSM6J501NU

2014-03-01

2

Electrical Characteristics

(Ta

=

25°C)

Characteristic Symbol Test Conditions Min Typ. Max Unit

V

(BR) DSS

I

D

= -1 mA, V

GS

= 0 V -20 ⎯ ⎯

Drain-Source breakdown voltage

V

(BR) DSX

I

D

= -1 mA, V

GS

= 5 V (Note 4) -15 ⎯ ⎯

V

Drain cut-off current

I

DSS

V

DS

= -20 V, V

GS

= 0 V ⎯ ⎯ -1 μA

Gate leakage current

I

GSS

V

GS

= ±8 V, V

DS

= 0 V ⎯ ⎯ ±1 μA

Gate threshold voltage

V

th

V

DS

= -3 V, I

D

= -1 mA -0.3 ⎯ -1.0 V

Forward transfer admittance

⏐Y

fs

⏐ V

DS

= -3 V, I

D

= -2.0 A (Note 3) 11 22 ⎯ S

I

D

= -4.0 A, V

GS

= -4.5 V (Note 3) ⎯ 12 15.3

I

D

= -4.0 A, V

GS

= -2.5 V (Note 3) ⎯ 14 19

I

D

= -4.0 A, V

GS

= -1.8 V (Note 3) ⎯ 17 26.5

Drain–source ON-resistance R

DS (ON)

I

D

= -2.0 A, V

GS

= -1.5 V (Note 3) ⎯ 20 43

mΩ

Input capacitance

C

iss

⎯ 2600 ⎯

Output capacitance

C

oss

⎯ 290 ⎯

Reverse transfer capacitance

C

rss

V

DS

= -10 V, V

GS

= 0 V, f = 1 MHz

⎯ 280 ⎯

pF

Total Gate Charge

Q

g

⎯ 29.9 ⎯

Gate-Source Charge

Q

gs1

⎯ 3.0 ⎯

Gate-Drain Charge

Q

gd

V

DD

= −10 V, I

D

= −10 A

V

GS

= −4.5 V

⎯ 5.6 ⎯

nC

Turn-on time

t

on

⎯ 45.2 ⎯

Switching time

Turn-off time

t

off

V

DD

= -10 V, I

D

= -2.0 A,

V

GS

= 0 to -2.5 V, R

G

= 4.7 Ω

⎯ 201 ⎯

ns

Drain-Source forward voltage

V

DSF

I

D

= 4 A, V

GS

= 0 V (Note 3)

⎯ 0.70 1.1 V

Note 3: Pulse test

Note 4: If a forward bias is applied between gate and source, this device enters V(BR)DSX mode.

Note that the drain-source breakdown voltage is lowered in this mode

Switching Time Test Circuit

Precaution

Let V

th

be the voltage applied between gate and source that causes the drain current (I

D

)

to be low (-1 mA for the

SSM6J501NU). Then, for normal switching operation, V

GS(on)

must be higher than V

th,

and V

GS(off)

must be lower than

V

th.

This relationship can be expressed as: V

GS(off)

< V

th

< V

GS(on)

.

Take this into consideration when using the device.

Handling Precaution

When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is

protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that

come into direct contact with devices should be made of antistatic materials.

Thermal resistance R

th (ch-a)

and power dissipation P

D

vary depending on board material, board area, board thickness

and pad area. When using this device, please take heat dissipation into consideration

t

on

t

off

(b) V

IN

(c) V

OUT

0 V

−2.5 V

V

DD

V

DS (ON)

t

r

t

f

90%

10%

(a) Test circuit

V

DD

= −10 V

R

G

= 4.7 Ω

Duty ≤ 1%

V

IN

: t

r

, t

f

< 5 ns

Common source

Ta = 25°C

0

−2.5 V

IN

OUT

V

DD

10 μs

R

G

SSM6J501NU

2014-03-01

3

0 -2.0 -4.0 -6.0

0

R

DS (ON)

– V

GS

-8.0

60

− 25 °C

25 °C

Ta = 100 °C

80

40

20

I

D

= -2.0 A

Common Source

Pulse test

100

I

D

– V

GS

-100

-0.0001

0

-1

-10

-0.01

-0.1

-0.001

-2.0

−25 °C

Common Source

V

DS

= -3 V

Pulse test

Ta = 100 °C

25 °C

-0.5 -1.5 -1.0

R

DS (ON)

– Ta

0

−50 0 50 150

10

100

-4.0 A / -1.8 V

-4.0 A / -2.5 V

-4.0 A / -4.5 V

50

Drain–source voltage V

DS

(V)

I

D

– V

DS

Drain current I

D

(A)

0

-10

0

-0.1

-6

-2

-4

-2.5 V

-8

R

DS (ON)

– V

GS

R

DS (ON)

– I

D

-1.5 V

0 -2.0

-4.0

-6.0

0

-8.0

60

− 25 °C

25 °C

Ta = 100 °C

80

40

20

I

D

= -4.0 A

Common Source

Pulse test

100

-8.00

-2.0 -4.0

0

-6.0

-1.5 V

-2.5 V

-1.8 V

10

20

30

V

GS

=-4.5 V

-10.0

Gate–source voltage V

GS

(V)

Drain current I

D

(A)

Gate–source voltage V

GS

(V)

Drain–source ON-resistance

R

DS (ON)

(mΩ)

Gate–source voltage V

GS

(V)

Drain–source ON-resistance

R

DS (ON)

(mΩ)

Drain current I

D

(A)

Drain–source ON-resistance

R

DS (ON)

(mΩ)

Ambient temperature Ta (°C)

Drain–source ON-resistance

R

DS (ON)

(mΩ)

Common Source

Ta = 25°C

Pulse test

Common Source

Pulse test

Common Source

Ta = 25 °C

Pulse test

-0.2 -0.3

5

15

25

I

D

= -2.0 A / V

GS

= -1.5 V

20

30

40

-1.8 V

V

GS

=-4.5 V

SSM6J501NU,LF

SSM6J501NU,LF

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