MT88L89 Data Sheet
22
Zarlink Semiconductor Inc.
Characteristics are over recommended operating conditions unless otherwise stated
Typical figures are at 25C, V
DD
= 3 V, and for design aid only: not guaranteed and not subject to production testing
NOTES: 1) dBm = decibels above or below a reference power of 1 mW into a 600 ohm load
2) Digit sequence consists of all 16 DTMF tones
3) Tone duration = 40 ms. Tone pause = 40 ms
4) Nominal DTMF frequencies are used
5) Both tones in the composite signal have an equal amplitude
6) The tone pair is deviated by
1.5%2 Hz
7) Bandwidth limited (3 kHz) Gaussian noise
8) The precise dial tone frequencies are 350 and 440 Hz (
2%)
9) Guaranteed by design and characterization. Not subject to production testing
10) Referenced to the lowest amplitude tone in the DTMF signal
11) For guard time calculation purposes
12) Operation of microprocessor interface requires that t
CL
+ t
CH
1000 ns
13) For Unity Gain Configuration
Figure 16 - Digital Signal Input Rise/Fall Times
10 Data setup time (write) t
DSW
60 ns Figures 17, 19
11 Data hold time (write) t
DHW
10 ns Figures 17, 19
12 Chip select setup time t
CSS
45 ns Figures 17 - 19
13 Chip select hold time t
CSH
10 ns Figures 17 - 19
14 DS/RD
set up time prior to CS
assertion
t
RDS,
t
DSS
20 ns Figures 17, 19
AC Electrical Characteristics
- MPU Interface - Voltages are with respect to ground (V
SS
), unless otherwise stated.
Characteristics Sym. Min. Typ.
Max. Units Conditions
MT88L89 Data Sheet
23
Zarlink Semiconductor Inc.
Figure 17 - Motorola BUS Timing Diagram
DS (E)
R/W
Read
AD3-AD0
(RS0, D0-D3)
Write
AD3-AD0
(RS0-D0-D3)
Addr *
non-mux
AS *
CS
= AS.Addr
* microprocessor pins
t
RWS
t
RWH
t
AS
t
DDR
t
DHR
Data
Data
t
AH
t
DSW
t
DHW
t
CSH
t
CSS
High Byte of Addr
Addr
Addr
t
DSS
t
CL
t
CH
MT88L89 Data Sheet
24
Zarlink Semiconductor Inc.
Figure 18 - Intel Read Timing Diagram
Figure 19 - Intel Write Timing Diagram
ALE*
WR
P0*
(RS0,
D0-D3)
P2 *
(Addr)
* microprocessor pins
t
CSS
t
AS
t
AH
t
DSW
t
DHW
Data
A8-A15 Address
t
CSH
A0-A7
RD
**
** RD must be high on the falling edge of CS for Intel Bus Timing
t
CH
t
CL
CS = ALE.Addr

MT88L89ASR1

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Telecom Interface ICs Pb Free 3V DTMF TRANSCEIVER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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