AD7817/AD7818 Data Sheet
Rev. E | Page 4 of 20
Parameter A Version
1
B Version
1
S Version
1
Unit Test Conditions/Comments
POWER REQUIREMENTS (AD7817 ONLY)
V
DD
5.5 5.5 5.5 V max For specified performance
2.7 2.7 2.7 V min
I
DD
Logic inputs = 0 V or V
DD
Normal Operation 2 2 2 mA max 1.6 mA typical
Using External Reference 1.75 1.75 1.75 mA max 2.5 V external reference connected
Power-Down (V
DD
= 5 V) 10 10 12.5 μA max 5.5 μA typical
Power-Down (V
DD
= 3 V) 4 4 4.5 μA max 2 μA typical
Auto Power-Down Mode V
DD
= 3 V
10 SPS Throughput Rate 6.4 6.4 6.4 μW typ
See the Power vs. Throughput
section for description of power
dissipation in auto power-down mode
1 kSPS Throughput Rate 48.8 48.8 48.8 μW typ
10 kSPS Throughput Rate 434 434 434 μW typ
Power-Down 12 12 13.5 μW max Typically 6 μW
DYNAMIC PERFORMANCE (AD7818 ONLY)
6
Sample rate = 100 kSPS, any channel,
f
IN
= 20 kHz
Signal-to-(Noise + Distortion) Ratio
2
57 dB min
Total Harmonic Distortion
2
–65 dB max −75 dB typical
Peak Harmonic or Spurious Noise
2
–67 dB typ −75 dB typical
Intermodulation Distortion
2
fa = 19.9 kHz, fb = 20.1 kHz
Second-Order Terms –67 dB typ
Third-Order Terms –67 dB typ
Channel-to-Channel Isolation
2
–80 dB typ f
IN
= 20 kHz
DC ACCURACY (AD7818 ONLY)
6
Any channel
Resolution 10 Bits
Minimum Resolution for Which No
Missing Codes are Guaranteed
10 Bits
Relative Accuracy
2
±1 LSB max
Differential Nonlinearity
2
±1 LSB max
Gain Error
2
±10 LSB max
Offset Error
2
±4 LSB max
TEMPERATURE SENSOR (AD7818 ONLY)
6
Measurement Error Internal reference V
REF
= 2.5 V
Ambient Temperature 25°C ±2 °C max
T
MIN
to T
MAX
±3 °C max
Measurement Error On-chip reference
Ambient Temperature 25°C ±2 °C max
T
MIN
to T
MAX
±3 °C max
Temperature Resolution 1/4 °C/LSB
ON-CHIP REFERENCE (AD7818 ONLY)
5
Nominal 2.5 V
Temperature Coefficient
3
30 ppm/°C typ
CONVERSION RATE (AD7818 ONLY)
6
Track-and-Hold Acquisition Time
4
400 ns max Source impedance < 10 Ω
Conversion Time
Temperature Sensor 27 μs max
Channel 1 9 μs max
Data Sheet AD7817/AD7818
Rev. E | Page 5 of 20
Parameter A Version
1
B Version
1
S Version
1
Unit Test Conditions/Comments
POWER REQUIREMENTS (AD7818 ONLY)
6
V
DD
5.5 V max For specified performance
2.7 V min
I
DD
Logic inputs = 0 V or V
DD
Normal Operation 2 mA max 1.3 mA typical
Using External Reference 1.75 mA max 2.5 V internal reference connected
Power-Down (V
DD
= 5 V) 10.75 µA max 6 µA typ
Power-Down (V
DD
= 3 V) 4.5 µA max 2 µA typ
Auto Power-Down Mode V
DD
= 3 V
10 SPS Throughput Rate 6.4 µW typ
See the Power vs. Throughput section
for description of power dissipation
in auto power-down mode
1 kSPS Throughput Rate 48.8 µW typ
10 kSPS Throughput Rate 434 µW typ
Power-Down 13.5 µW max Typically 6 µW
ANALOG INPUTS (AD7817/AD7818)
7
Input Voltage Range V
REF
V
REF
V
REF
V max
0 0 0 V min
Input Leakage ±1 ±1 ±1 µA min
Input Capacitance 10 10 10 pF max
LOGIC INPUTS (AD7817/AD7818)
4
Input High Voltage, V
INH
2.4 2.4 2.4 V min V
DD
= 5 V ±10%
Input Low Voltage, V
INL
0.8 0.8 0.8 V max V
DD
= 5 V ±10%
Input High Voltage, V
INH
2 2 2 V min V
DD
= 3 V ±10%
Input Low Voltage, V
INL
0.4 0.4 0.4 V max V
DD
= 3 V ±10%
Input Current, I
IN
±3 ±3 ±3 µA max Typically 10 nA, V
IN
= 0 V to V
DD
Input Capacitance, C
IN
10 10 10 pF max
LOGIC OUTPUTS (AD7817/AD7818)
4
Output High Voltage, V
OH
I
SOURCE
= 200 µA
4 4 4 V min V
DD
= 5 V ± 10%
2.4 2.4 2.4 V min V
DD
= 3 V ± 10%
Output Low Voltage, V
OL
I
SINK
= 200 µA
0.4 0.4 0.4 V max V
DD
= 5 V ± 10%
0.2 0.2 0.2 V max V
DD
= 3 V ± 10%
High Impedance Leakage Current ±1 ±1 ±1 µA max
High Impedance Capacitance 15 15 15 pF max
1
The B Version and the S Version only apply to the AD7817. The A Version applies to the AD7817 or the AD7818 (as stated in specification).
2
See Terminology.
3
The accuracy of the temperature sensor is affected by reference tolerance. The relationship between the two is explained in the Temperature Measurement Error Due
to Reference Error section.
4
Sample tested during initial release and after any redesign or process change that may affect this parameter.
5
On-chip reference shuts down when external reference is applied.
6
These specifications are typical for AD7818 at temperatures above 85°C and with V
DD
greater than 3.6 V.
7
This refers to the input current when the part is not converting. Primarily due to the reverse leakage current in the ESD protection diodes.
AD7817/AD7818 Data Sheet
Rev. E | Page 6 of 20
TIMING CHARACTERISTICS
V
DD
= 2.7 V to 5.5 V, GND = 0 V, REF
IN
= 2.5 V. All specifications T
MIN
to T
MAX
, unless otherwise noted. Sample tested during initial
release and after any redesign or process changes that may affect the parameters. All input signals are measured with tr = tf = 1 ns (10% to
90% of 5 V) and timed from a voltage level of 1.6 V. See Figure 17, Figure 18, Figure 21, and Figure 22.
Table 2.
Parameter A Version/B Version Unit Test Conditions/Comments
t
POWER-UP
2 µs max
Power-up time from rising edge of CONVST
t
1a
9 µs max Conversion time Channel 1 to Channel 4
t
1b
27 µs max Conversion time temperature sensor
t
2
20 ns min
CONVST
pulse width
t
3
50 ns max
CONVST
falling edge to BUSY rising edge
t
4
0 ns min
CS
falling edge to RD/WR falling edge setup time
t
5
0 ns min
RD/WR
falling edge to SCLK falling edge setup
t
6
10 ns min D
IN
setup time before SCLK rising edge
t
7
10 ns min D
IN
hold time after SCLK rising edge
t
8
40 ns min SCLK low pulse width
t
9
40 ns min SCLK high pulse width
t
10
0 ns min
CS
falling edge to RD/WR rising edge setup time
t
11
0 ns min
RD/WR
rising edge to SCLK falling edge setup time
t
12
1
20 ns max
D
OUT
access time after RD/WR rising edge
t
13
1
20 ns max D
OUT
access time after SCLK falling edge
t
14a
1, 2
30 ns max
D
OUT
bus relinquish time after falling edge of RD/WR
t
14b
1, 2
30 ns max
D
OUT
bus relinquish time after rising edge of CS
t
15
150 ns max
BUSY
falling edge to OTI falling edge
t
16
40 ns min
RD/WR
rising edge to OTI rising edge
t
17
400 ns min
SCLK rising edge to CONVST
falling edge (acquisition time of T/H)
1
These figures are measured with the load circuit of Figure 3. They are defined as the time required for D
OUT
to cross 0.8 V or 2.4 V for V
DD
= 5 V ± 10% and 0.4 V or 2 V for
V
DD
= 3 V ± 10%, as shown in Table 1.
2
These times are derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 3. The measured number is then
extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the times quoted in the timing characteristics are the true bus
relinquish times of the part and as such are independent of the external bus loading capacitances.
200µA I
OL
200µA I
OL
1.6V
TO OUTPUT
PIN
C
L
50pF
01316-003
Figure 3. Load Circuit for Access Time and Bus Relinquish Time

AD7818ARMZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 1CH 10B W/ON-CHIP TEMP SENSOR IC
Lifecycle:
New from this manufacturer.
Delivery:
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