MCP1602
DS22061A-page 12 © 2007 Microchip Technology Inc.
4.0 DETAILED DESCRIPTION
4.1 Device Overview
The MCP1602 is a synchronous buck regulator with a
power-good signal. The device operates in a Pulse
Frequency Modulation (PFM) mode or a Pulse Width
Modulation (PWM) mode to maximize system
efficiency over the entire operating current range.
Capable of operating from a 2.7V to 5.5V input voltage
source, the MCP1602 can deliver 500 mA of
continuous output current.
When using the MCP1602, the PCB area required for
a complete step-down converter is minimized since
both the main P-Channel MOSFET and the synchro-
nous N-Channel MOSFET are integrated. Also while in
PWM mode, the device switches at a constant
frequency of 2.0 MHz (typical) which allow for small fil-
tering components. Both fixed and adjustable output
voltage options are available. The fixed voltage options
(1.2V, 1.5V, 1.8V, 2.5V, 3.3V) do not require an external
voltage divider which further reduces the required
circuit board footprint. The adjustable output voltage
options allow for more flexibility in the design, but
require an external voltage divider.
Additionally the device features undervoltage lockout
(UVLO), overtemperature shutdown, overcurrent
protection, and enable/disable control.
4.2 Synchronous Buck Regulator
The MCP1602 has two distinct modes of operation that
allow the device to maintain a high level of efficiency
throughout the entire operating current and voltage
range. The device automatically switches between
PWM mode and PFM mode depending upon the output
load requirements.
4.2.1 FIXED FREQUENCY, PWM MODE
During heavy load conditions, the MCP1602 operates
at a high, fixed switching frequency of 2.0 MHz (typi-
cal). This minimizes output ripple (10 - 15 mV typically)
and noise while maintaining high efficiency (88% typi-
cal with V
IN
= 3.6V, V
OUT
= 1.8V, I
OUT
= 300 mA).
During normal PWM operation, the beginning of a
switching cycle occurs when the internal P-Channel
MOSFET is turned on. The ramping inductor current is
sensed and tied to one input of the internal high-speed
comparator. The other input to the high-speed compar-
ator is the error amplifier output. This is the difference
between the internal 0.8V reference and the sensed
output voltage. When the sensed current becomes
equal to the amplified error signal, the high-speed
comparator switches states and the P-Channel
MOSFET is turned off. The N-Channel MOSFET is
turned on until the internal oscillator sets an internal RS
latch initiating the beginning of another switching cycle.
PFM-to-PWM mode transition is initiated for any of the
following conditions:
• Continuous device switching
• Output voltage has dropped out of regulation
4.2.2 LIGHT LOAD, PFM MODE
During light load conditions, the MCP1602 operates in
a PFM mode. When the MCP1602 enters this mode, it
begins to skip pulses to minimize unnecessary
quiescent current draw by reducing the number of
switching cycles per second. The typical quiescent
current draw for this device is 45 µA.
PWM-to-PFM mode transition is initiated for any of the
following conditions:
• Discontinuous inductor current is sensed for a set
duration
• Inductor peak current falls below the transition
threshold limit
4.3 Power-Good (PG)
The open-drain power-good (PG) circuitry monitors the
regulated output voltage. A fixed delay time of
approximately 262 ms is generated once the output
voltage is above the power-good high threshold,
V
TH_H
, (typically 94% of V
OUT
). As the output voltage
falls below the power-good low threshold, V
TH_L
,
(typically 92% of V
OUT
) the PG signal transitions to a
low state indicating that the output is out of regulation.
The PG circuitry has a typical 165 µs delay when
detecting a falling output voltage. This helps to
increase the noise immunity of the power-good output,
avoiding false triggering of the PG signal during line
and load transients.
FIGURE 4-1: Power-Good Timing.
V
TH_H
V
OUT
PG
t
RPU
t
RPD
V
OL
V
OH
V
TH_L
